Questions tagged [memory]
Consider instead more specific tags, e.g., dram, sram, flash
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Memory Capacity and Memory Addresses
According to this site, in Table2, HBM(HBM2e) has a capacity of 8Gb = 2^33 bits per channel. Here, it has a 24-bit address consisting of 4 bits from the Bank address BA[3:0], 15 bits from the Row ...
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Is it wrong to use Thévenin's theorem on this memory circuit?
In my electricals beginner class I was given a paper about memory circuits. There was a small section about how writing data to a single memory cell worked.
Here is the sketch of the memory cell:
The ...
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How to handle flash write/read operations on STM32L552 with ICACHE enabled without disabling it?
I am currently working with an STM32L552 microcontroller and encountering some peculiar behavior when writing and reading double words to and from the flash memory. After writing data to a specific ...
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How I can store data code for LONG time 100-200y - ESP32, Arduino, Data Retention, Reliability, Lifetime, Flash
I'm working on a research project in winch we want embedded sensors and logic, an ESP32, inside building's pillar surrounded by concrete. The ESP32 collects data through sensors, process them and send ...
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Why is memory addressed using 2 address decoders only and not more? [duplicate]
I am currently taking a university course about computer architecture in which we learned basic DRAM architecture and addressing. As far as I know, each latch is selected using decoder outputs to ...
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Synchronising data input and filter coefficient so that both reach at same time and give filter output in semi parallel/parallel filter in Verilog
I have designed an 8-tap filter using 8 coefficients in a semi-parallel fashion. I want to get the correct output for a FIR filter design by using 8 DSPs and one SRLC32E register. Here I pass my input ...
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6502 Extra Cycles on Page Cross
On the 6502 processor, when using the Absolute,X, Absolute,Y or (Indirect),Y addressing ...
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MUX in a 4 bit by 3 bit memory
Here is a 3-bit adressable memory with an adress space of 4.
My question is why is the book calling the 3 rightmost highlighted circuits MUXes? And what type of MUXes are they? 4:1 MUX? And if it is ...
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Finding correct memory IC [closed]
I have a project where I need to store data (~16Mo) on a memory IC and be able to fetch the data fast (<36000bits/s) (with DMA in the idea).
My µcontroller is an Arduino DUE. So far I've tried a ...
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Reflashing firmware for preventive purposes
This is a relatively common malfunction for the installed firmware in some old electrical devices to become corrupted. I often see this in repair videos, and there's often an easy fix - reflash the ...
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Finding memories power dissipation
Can someone tell me how to calculate the power dissipation of digital ICs like NAND Flash, QSPI NOR Flash and microcontrollers?
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eMMC interfacing with EC200U SDIO Power domain
I need to interface my eMMC(THGBMJG6C1LBAU7) memory with EC200U from Quectel.
The Quectel E200U has two SDIO ports one is working at 3.3V power domain and
other one is working at 1.8V power domain.
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SDRAM and I2S on STM32
I am using an STM32F429 discovery board to develop a DSP platform for making some sound effects. I have I2S streaming and passing through, and I have SDRAM configured where I can talk to it and even ...
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DRAM Memory : How is data stored from the HDD to DRAM? [closed]
When storing data from HDD to DRAM, is one large data block (e.g., 8 bytes) stored in one chip? Or is it distributed among multiple chips in a DIMM? If it is distributed, how many bytes of consecutive ...
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