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0 votes
1 answer
159 views

How to understand Register Address, Bits, and Reset value of an electronic component?

Source: Page 31 ADXL355 MEMS' Datasheet. Source: Page 32 ADXL355 MEMS' Datasheet The above is some of ADXL355 Accelerometer Register map table. From that table, in the RESET column, there are their ...
AirCraft Lover's user avatar
3 votes
1 answer
238 views

How can I improve this RAM implementation in VHDL?

I'm practicing for a lab exam and I'm trying to solve one from past years. I feel like I'm doing something wrong because I don't have much experience with VHDL. Exam question Write the VHDL code for ...
iknotum's user avatar
  • 33
-1 votes
2 answers
94 views

Bistable memory cell with paired buffers instead of paired inverters

Bistable memory cells with paired inverters are very standard and basic building blocks (was used in Intel 8086 for example. ) But why not use paired buffers instead?
BipedalJoe's user avatar
0 votes
1 answer
1k views

How do computer memories interact with each other (registers, cache, RAM, ROM)?

After Googling around for some time, I have managed to get a good understanding what makes these components different, but I've yet to find any clear computer architecture-focused article/thread on ...
EL02's user avatar
  • 103
1 vote
2 answers
971 views

STM32 bare-metal programming - Memory addressing in 32-bit system - memory offset

I am coming from a mechanical background and some Atmega experience, now doing some bare-metal programming courses on ARM processors. So far it is looking great, digging into documentation about uC ...
Aljaz Jelen's user avatar
0 votes
2 answers
147 views

How many times can a register bit be changed in AVR?

I am writing a program for an ATmega328P. I have a while loop inside which I am enabling the UART receiver complete interrupt flag using the command ...
vishnu m c's user avatar
0 votes
1 answer
76 views

Shared rising edge detector? [closed]

Why do we have a rising edge detector in every flip flop of a register. Can't we just make a shared one for all the flip flops in order to save hardware?
Ctvpd's user avatar
  • 11
0 votes
0 answers
34 views

How do I read the value of registers in Logism?

I am designing a CPU in logism. One of the components of the CPU is a register circuit (RegFile), which stores the registers data. The register circuit (RegFile) is shown below: I am able to write ...
Adam Lee's user avatar
  • 113
1 vote
0 answers
22 views

Recover correct value from unstable memory through read operation

We are given a memory with 32-bit width for each word. it has the length (N - number of rows) which is not relevant for the question. we know that the memory has a problem where at any row, one bit ...
Firas Abd El Gani's user avatar
0 votes
2 answers
327 views

The CPU has registers, but doesn't the RAM have registers too?

At low-level, registers are the same as a bunch of flip-flops connected by the same clock, so I would think RAM is made of registers. I've been reading, though, that registers are only in the cpu, ...
Duarte Arribas's user avatar
0 votes
1 answer
154 views

Decoder inputs needed given 32 registers

I have a couple of questions about decoders. My first is this: If I have a register bank with 32 registers, how many inputs are needed for the decoder and why? I think that you need 5 inputs for this ...
bmb's user avatar
  • 103
3 votes
1 answer
442 views

Are Tri-state buffers even necessary?

I'm trying to make a 1-bit computer, and I'm stuck on the registers. I think I am going to have 2 of them, and I want a way to separate their outputs. Let me explain. Let's say Register A has a 0, and ...
Trevor Mershon's user avatar
1 vote
1 answer
593 views

Assembly language, accessing bytes of memory

I have some memory address 0x00000100 that I want to read from. The lower 4 bits read from this address indicates the states of 4 buttons - So bit 0 shows the state of button 0, bit 1 shows the state ...
Angela's user avatar
  • 23
5 votes
8 answers
3k views

What prevents the construction of a CPU with all necessary memory represented in registers? [duplicate]

Modern CPUs employ a hierarchy of memory technologies. Registers, built into the chip have the lowest access times, but are expensive and volatile. Cache is a middle-man between RAM and registers to ...
user avatar
0 votes
2 answers
292 views

Are memory-mapped registers actually implemented as real registers?

I am currently trying to better understand microcontroller-architectures and I am particularly studying the ARM cortex-m3 right now. What I have always wondered is, if memory mapped registers are ...
Jonas Eschmann's user avatar

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