All Questions
28
questions
1
vote
0
answers
166
views
How to handle flash write/read operations on STM32L552 with ICACHE enabled without disabling it?
I am currently working with an STM32L552 microcontroller and encountering some peculiar behavior when writing and reading double words to and from the flash memory. After writing data to a specific ...
- 229
2
votes
2
answers
453
views
Keil uVision Disassembly Window with ARM Microcontroller
I have a couple of probably simple questions for you all regarding disassembly from C code to assembly code. I am using Keil uVision as a programmer and debugger with a TIVA TM4C123GXL microcontroller ...
- 1,555
2
votes
1
answer
703
views
Why DMA can't approach global variable (STM32)?
I test memory to memory DMA with my STM32H750VBT.
I study with following this link. enter link description here
According this link, source is inside flash and destination is inside SRAM.
I test ...
- 115
1
vote
2
answers
971
views
STM32 bare-metal programming - Memory addressing in 32-bit system - memory offset
I am coming from a mechanical background and some Atmega experience, now doing some bare-metal programming courses on ARM processors. So far it is looking great, digging into documentation about uC ...
- 47
3
votes
2
answers
1k
views
maximum memory supported by processor - why often stated less than 1TB?
I want to understand technical details of limitations of maximum memory size a system / processor can support. Below what I was able to find via web search to date Wiki:
Modern 64-bit processors such ...
- 247
0
votes
2
answers
368
views
Difference between ARM7 and intel i3, i5 & i7 processors
I am just starting out on a journey to understand microcontroller and microprocessor design. Have read briefly on their differences (ARM7 and Intel i3, i5 & i7).
Couldn't find any information on ...
- 23
0
votes
1
answer
293
views
How to prevent a function from overwriting memory?
I'm writing a program that basically aquires samples from a signal and does FFT on it (I'm using STM32L432KC MCU). I'm trying to send results from the FFT calculations through UART but there is a ...
- 39
0
votes
1
answer
2k
views
Understanding addressing and size in memory map
TM4C123 has 256 kiBytes of flash ROM as shown in the memory map. The range of memory addresses for the ROM is 0x0000.0000 to 0x0003.FFFF (a 32bit address), totaled to 3x16x16x16x16 = 196,608 number of ...
- 1,438
5
votes
4
answers
2k
views
The memory regions I can write and cannot write to, ARM Cortex-M architecture
I hope my title is correct terminologicaly. I am working(learning) with STM32F4 discovery board, which has an STM32F407VGTx microcontroller on it. I really try to find the answers in the reference ...
- 2,106
1
vote
1
answer
676
views
Cortex-M3, Code region vs SRAM/RAM
In the ARM Cortex-M3 processor core, the memory map contains: a Code region, SRAM and a RAM. What makes the use of the code region different than the other memories? In addition, what is the nature of ...
- 527
1
vote
1
answer
744
views
Cortex M4 memory management suggestions: best data/code placement
I'm trying to implement a rather complex (at least for me!) system on a Cortex M4 mcu: LPC4370. This one has HighSpeed ADC (up to 80Msps), DMA and DSP (Single Instruction Multiple Data) instructions.
...
- 327
0
votes
1
answer
235
views
Memory Boundaries in SRAM
I am trying to use the GPDMA which is present in LPC43XX parts.
The UM10503 data sheet constantly warns about memory boundaries (datasheet section 21): basically it says that you don't want to try a ...
- 327
0
votes
1
answer
81
views
Using narrower DDR RAM than controller
I have some ARM processor that have 72-bit width (8 for ECC) RAM controller.
Can I buy eg. two 32bit chips and combine them? If yes then how?
Can I buy just one 32bit and pull down rest of data pins ...
1
vote
1
answer
2k
views
What's the need of translating the virtual address to physical address?
These are the points I read in the Memory Management Unit of ARM architecture:
Virtual addresses (or logical addresses) are addresses provided by the OS to processes.
One virtual address space per ...
user105009
0
votes
1
answer
365
views
Basic Memory Sytem for ARM-based system
I am studying ARM Architecture and there is a slide which I didn't understand and can't find anywhere on the internet (Google, YouTube) - I've also looked for ARM homepage but they don't display any ...
- 9