Questions tagged [verification]
Assurance of satisfiability of all the expected requirements in either software or hardware systems.
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How to measure time difference between 2 signal changes in verilog?
There are two signals sig, enable - and I wanted to find the time difference after which enable toggles after sig falls. ( >Sig Low to Enable toggle< time)
I understand that always@() block can't ...
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Verification of this CMOS realisation
I have to make the CMOS-equivalent of this function: \$A'*B'+C'\$. I made this CMOS-circuit, but I'm not sure if it's correct:
simulate this circuit – Schematic created using CircuitLab
The ...
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Is there a "standard" way to verify HDL of a state machine?
State machines are a pattern that is used very often in writing synchronous designs. They serve as the controllers in the design. So, is there a standard way to verify them if they are written using ...
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How can a IC (or transistors or diodes) design make it difficult for a malicious manufacturer to subvert it undetected? [closed]
Introduction
This is a spin of from my question on security.se. To give more context:
If I have a threat model where
the adversary
wants to corrupt computation or steal information
...
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Some general question on verification from scratch
I'm not a huge expert on hardware verification, I mean I know what the purpose of verification is (basically check if the system what it is expected to do) and I've used some tools for verification, ...
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What are the typical tasks of a Design Verification Engineer? [closed]
I'm quite confused on what should be the typical tasks of a Design Verification Engineer in ASIC Design. In my experience these were the things that I do:
Create verification plan
Create testbench ...
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Can the machine readable files for integrated circuits be verified by the manufacturer design team?
My question is simple if you take the chip design files (blue print files for the fabrication process) which are used by the fabrication process that the design engineer(s) have completed the files ...
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Is sytem level testcase different from block level testcase? And what is a test vector?
I usually see these terms. In the field of Digital IC Design or in Design Verification, is system level testcase different from a block level testcase? I mean I know they differ from the level of ...
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What does this sentence mean in this question (simulator can handle X inputs)?
In my book, one question requires me to find the verification sequence for a circuit. From what I understand, verification sequence must be such that every path is traversed.
Then the book ...
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How can a manufacturer verify a circuit design? [closed]
Could anyone tell me what means (other than reversing) available to manufacturer of integrated circuits (latest Intel PC CPU's) that would allow them to verify that the actual design on die is ...
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How do you check your schematic before passing to layout [closed]
I am working with Altium.
What verification do you particularly do when going from schematic to layout in terms of electronic and in terms of capture ?
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Writing synthesizable testbenches
I'm just starting to learn SystemVerilog and work with FPGAs, and so far I haven't found a satisfactory way to test my code. I'm coming from a software background, and I have always been writing ...
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Electronics System Standards Compliance: Certification, Testing & Verification
Please note: this question has to do with the technical compliance aspects of the consumer electronics indsutry, and as such, I believe is within scope for this site. This question is about compliance,...
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Thevenin equivalent (verification of answer)
\$ R_{TH} = R1 + R2//R5 + R3//R4\$
Then considering the current source and the resistance R3 as a Norton circuit, one can convert it to Thevenin as follows \$V_I = -IR3\$. Then we have the voltage ...
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Power calculation of circuits
Please read on..... this looks long but is entry level and easy
I have done many simple projects based on microcontrollers but have not considered power and required current(for circuit to work) ...
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