Questions tagged [fabrication]
The fabrication tag has no usage guidance.
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Process compatibility between a non-planar avalanche photodiode and planar CMOS at 0.130μm process technology node
I plan to integrate a non-planar P⁺⁺/i/P⁺/N⁺⁺ avalanche photodiode (APD) array with a peripheral control circuit (e.g., trans-impedance amplifier, analog-to-digital converter, and quenching circuit) ...
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Why are drain and source not actually perfectly symmetric?
In textbook treatments, one has that the source and drain of a MOSFET are completely symmetrical and therefore interchangeable -- the distinction is only made by which is at a higher voltage in the ...
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On different well processes (fabrication process)
My textbook (Weste and Harris's CMOS VLSI Design) is trying to explain to me the nature of fabricating wells in the twin-well and triple-well processes. My question here is about how we can use so few ...
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Why do fabs bother to print circuitry right up to the edges of a wafer when they know that the partial dies will be discarded later?
Around the edge of a wafer (see image below) you will observe that there are many partial dies. It seems wasteful to use the lithography machine to print these partial dies because they will be ...
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What does optimizing fabs "for throughput rather than latency" mean?
In the context of a whirlwind tour of the modern VLSI design, tapeout, and fabrication flow in their CMOS VLSI Design, Weste and Harris write the following:
Multiple chips are manufactured ...
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How does MOSIS let designers “share” a mask set?
In Weste and Harris's CMOS VLSI Design, they describe MOSIS as follows:
The MOSIS service [Piña02] is a low-cost prototyping service that collects designs from academic, commercial, and government ...
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How many LC oscillators can you easily fit on a single chip?
I recently read this interesting blog post about 'thermodynamic computing' that tickled my fancy.
The TLDR version is that the authors designed and built a circuit that can perform matrix inversion ...
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Ribbon Cable Pin Assignment
Preface: I am complete novice at electronics and this is my first project.
I am trying to connect two PCB together with a 10pin ribbon cable. The ribbon cables I made (and bought) are all showing ...
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Why aren't inverters used in a half adder made of NOR gates?
That's schematic of half adder using only NOR gates.
Why aren'y inverters used?
In the picture, there are 2 NOR gates where the two inputs are same as A or B.
Why don't we replace these with a NOT ...
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Suggested Configuration of Sputtering System?
hopefully this is in the right section, a lot of electrical engineers work in semiconductors. I have an old hummer II desktop sputter coater I am trying to make use of. The documentation of something ...
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Understanding fabrication steps of creating TFT MOSFET from ZnO
A few days ago I found this paper about fabricating a thin film MOSFET using ZnO at low temperature.
It seems promising to me (to do at home, some people actually made their own MOSFET at home but ...
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Does wire size matter? If so, how?
I took the transformer from a microwave to make a spot welder. I cut the secondary wire out. Now I'm supposed to wrap a wire around the iron base. Primary wire is much smaller gauge than the secondary,...
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We fabricate P-type and N-type Schottky diodes and a P-type Schottky diode; can a PN-junction diode and PNP BJT be formed?
A Schottky diode is a unipolar device. If a P-type Schottky diode is fabricated on an N-type Schottky diode, can we make a PN-junction diode and a PNP transistor?
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What does "field" in field oxide mean?
This is an excerpt from Design of Analog CMOS Integrated Circuits by Behzad Razavi. What does "field" in field oxide mean here, electric field?
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Why is silicon used as PCBs?
I know why silicon is used for ICs and transistors in general due to its doping features. But I don't know why we use silicon as a PCBs, all we need is to isolate pins from each other in a PCB, right? ...