Questions tagged [soc]
A system on a chip or system on chip (SoC) is an integrated circuit (also known as an "IC" or "chip") that integrates all components of a computer or other electronic systems. It may contain digital, analog, mixed-signal, and often radio-frequency functions—all on a single substrate. SoCs are very common in the mobile computing market because of their low power consumption. A typical application is in the area of embedded systems.
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How to measure Lithium-ion battery SoC?
I have a 48 V 1.2 Ah Lithium-ion battery pack.
I am struggling in finding a way to measure its State of Charge.
It will be charged through a 13S JBD BMS.
I need to spit out information from the ...
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How can I figure out the root cause of High Current consumption of the device?
I am working on a device which has two MCUs (MCU A, MCU B). The MCUs are communicating with each other via UART.
The MCU B is an SoC (EFR32) which we are using for Z-Wave communication. So basically, ...
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General purpose system integration tool for FPGA/ASIC system on chip design
Intel/Altera Quartus offers Platform Designer (formerly Qsys and SOPC Designer before that). Xilinx offers Block Designers in their Xilinx Vivado. Microsemi offer SmartDesign in their Libero SoC.
In ...
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Issue with Running Two Separate Codes on Intel Cyclone V SoC ARM Cortex A9 Dual Core via QSPI
I am working on an Intel Cyclone V SoC ARM Cortex A9 Dual Core setup and aiming to execute two distinct codes on Core 0 and Core 1 in bare-metal mode. While I've successfully executed this setup using ...
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Is creating a voltage rail loop good or bad practice?
I am still new to PCB design but I often run into this.
Say I have a USB connector on the bottom of a board, a SoC on the top, an LDO somewhere in the middle, and miscellaneous stuff on the sides. It'...
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SOC booting FPGA configuration file
I have some understanding on embedded system booting process, which includes step wise execution of:
ROM boot loader.
First stage boot loader - internal to SOC.
Second stage boot loader - stored on ...
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Help with selecting charging IC for LiPo battery charge management
I have a project for which I have a 1 cell LiPo battery, and of course I need a BMS to monitor it and charge it/ensure it doesn't get discharged too far. I also want LED indicators to inform of the ...
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How to find BOOT-SEL GPIO PIN?
I'm new to embedded linux and trying to explore it using Allwiner T113-i EVB.
Right now I'm struggling with boot process.
According to user manual BROM of SoC will try fetch boot code from SD card if ...
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What tool is required to implement data transfer between PS and PL of Zynq 7000 SoC?
I am new to embedded programming. I undetstand a little bit what Vivado and Petalinux does. But I would like to how exactly I can use Vivado and Petalinux to perform data transfer between ...
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What's the best RF scheme and chip for my project?
I'm making a little scanning beacon gizmo. When a laser shines on it from ~40m away, it is supposed to transmit its ID and HIGH (1) to the laser controller ~40m away. Otherwise, transmit 0 or nothing. ...
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Why are the challenges in using SRAM over DRAM for main memory?
Historically, when compared to DRAM (dynamic ram), SRAM (static ram) is more expensive with a lower density, but it's much faster and more efficient. As a result, SRAM is reserved for devices, such as ...
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Can we service another memory request from L1 cache when an L1 miss is being serviced from L2?
Consider the case where L1 cache miss occurred and is being serviced by L2 cache which could take many cycles (may go to main memory in case of L2 cache miss). In the meantime L1 cache is idle, in ...
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"ERROR: [DRC RTRES-1] Backbone resources: 1 net(s) have CLOCK_DEDICATED_ROUTE set to BACKBONE but do not use backbone resources." in newest Vivado
I am following section "Baseline Vivado project" in page 165-170 of book "Architecting High-Performance Embedded Systems: Design and build high-performance real-time digital systems ...
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Which kinds of embedded platforms can be considered well-suited for acquiring a general taste of interrupts? [closed]
I'm an application programmer without much knowledge in low-level programming. I've set up a basic toolchain for assembly programming with the ATMega328P on an Arduino Uno R3 board. One of my aims is ...
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How to sample the read data from blocking logic safely by using the interface of SystemVerilog?
I'm trying to read data from combinational logic.
module my_reg(;
...
output reg [31:0] rdata;
)
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always @(data)
rdata = 32'h18;
and this dut's value ...
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How to monitor the HWDATA and HRDATA in AHB-LITE on the all clock?
I'm trying to monitor the HRDATA and HWDATA on the AHB-Lite bus transfer.
The monitor message should only appear when a command(...
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Model Microcontroller's Power Consumption
I am currently building a simulator (time-domain model) that includes a System-on-Chip, a constant voltage source and a series resistor.
Current solution:
My initial intuition was to model the SoC's ...
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Attaching Ethernet interface to an SoC which has no embedded Ethernet circuit
We are developing an ARMv8 processor based SoC which doesn't have ethernet IP inside. Now it's in FPGA form.
Currently I'm using SD card interface to load Linux and file system. But during the ...
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On Chip Peripheral Emulation - How to accomplish communication with an emulated peripheral that relies on bidirectional signals in between?
I recently asked some questions for an application in hope to gain more clarity on how to accomplish an emulation of an input device peripheral (in my case an input mouse) in simulation. Following ...
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Relationship between PSEL and PENABLE signals in the APB protocol
I would like some clarification on the relationship between the PSEL and PENABLE signals in the APB Protocol. The specification states:
The PENABLE signal is asserted the following clock after PSEL ...
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Connection of two devices
I need to design an Ethernet interface.
Requirements: It should have two RJ45 connectors at 1Gbps data rate and two fiber-optic at 1Gbps rate.
The system has two SoMs (Kria K26) and each one should ...
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Regarding RTC drift
Basically there are two RTCs:
1.internal RTC
2.external RTC
Internal RTC has no battery backup whereas external RTC has CR2032 battery to maintain time in absence of power supply. For accuracy ...
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Difference between Internal and External RTC [duplicate]
what is the difference between internal and external RTC ?
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Battery nominal capacity estimation using Coulomb Counting and Matlab lsqnonlin
I'm trying to estimate the nominal capacity of a PV plant battery pack collecting SOC data from the BMS using current discharge. Once I've collected current, time and SOC data I put those data into ...
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Unable to get frequency on oscilloscope
I am using NOR flash IS25WP256D in my project. I configured a frequency of 80 MHz and a bus width of 4 in DTS, but when I observed with an oscilloscope I got 62 MHz.
Why does this happen?
These are ...
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RTC counter wrap mode
In the synopsis of the datasheet for RTC we have one feature i.e. counter wrap mode
My understanding for this feature: RTC is 32-bit, i.e. \$\ 2^{32} = 4295947296\ \$ seconds counter will increment ...
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Adding a Bluetooth Peripheral to an STM32
I'm making a device that is powered by an STM32F072C8Tx.
I want to add a bluetooth peripheral to this that can connect to the computer as a HID and transmit keypresses.
I've considered swapping the ...
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Does many VCC pins for an SoC need many decoupling capacitors?
I have been recently interested into creating my own CC2530 board for a Zigbee device and was following the sample schematics provided by TI. I am a newbie to board design and have some basic ...
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OTA via BLE on Cypress CYBLE-222014-01 Module
I have developed an application using the CYBLE-222014-01 module which acquires a set of data and transmits it over BLE. Now I would like to add OTA functionality to this project, however the ...
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CR2450 Battery SOC vs. Voltage
Just purchased some Maxell CR2450HR batteries off AliExpress for my TPMS sensors. Don't know how long they have been in storage. Is there a way to check how good these batteries are? Measured the open ...
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