Questions tagged [system-on-chip]
Also known as a SOC, it is another name for a silicon chip which has a high degree of integration. Named principally because it incorporates devices like a uProcessor and a modem and a memory controller that might of at one time been separate chips on a PCB.
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General purpose system integration tool for FPGA/ASIC system on chip design
Intel/Altera Quartus offers Platform Designer (formerly Qsys and SOPC Designer before that). Xilinx offers Block Designers in their Xilinx Vivado. Microsemi offer SmartDesign in their Libero SoC.
In ...
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What does an AND gate inside a box mean?
I'm looking at this clock diagram, and it has five of these little boxes with symbols that look like AND gates inside them. But, they only have one input. What do they mean here?
Source here
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Modern DDR4 memory access latency system analysis
The memory access latency for the Intel Core i7-11800H (source: chipsandcheese, cpu latency for Intel Core i7-11800H), using DDR4-3200, reveals specific timings: 1 ns for L1, 3 ns for L2, and 13 ns ...
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Does the chipset act as a "gateway" to the system bus?
I am trying to understand how exactly the main memory and peripheral devices like NIC, video card, hard disk, USB, etc. are physically or electrically connected to the system bus. Pasting here the ...
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SOC booting FPGA configuration file
I have some understanding on embedded system booting process, which includes step wise execution of:
ROM boot loader.
First stage boot loader - internal to SOC.
Second stage boot loader - stored on ...
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What is this chip? Is it re-programmable? [duplicate]
I found this chip inside my kid's walker. Seems like it stores the pre-installed audios of children's rhymes. It's connected to several LEDs, a mono speaker and two button pcbs. I wanna replace the ...
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What is a chip generator?
I've been trying to learn more about the RISC-V environment. I've encountered a chip generator called Rocket Chip.
What is a chip generator, and how does it differ from a core? I'm trying to ...
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Model Microcontroller's Power Consumption
I am currently building a simulator (time-domain model) that includes a System-on-Chip, a constant voltage source and a series resistor.
Current solution:
My initial intuition was to model the SoC's ...
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Difference between Internal and External RTC [duplicate]
what is the difference between internal and external RTC ?
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Is it possible for an SoC to have a built-in SSD?
Is it possible to have an SoC that includes an SSD on-chip, or are there technical constraints that prevent that? What are those technical constraints, if any?
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STM32 Low power series microcontroller or STM32WL series with integrated LoRA? (IoT Device)
I'm starting a design of IoT device. Trouble that I have is deciding which setup to use. I would like to someone with more experience can point me to right direction. With everything that is happening ...
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Snapdragon SoC includes cellular modem RF. Does it still need a baseband CPU? [closed]
As per https://www.qualcomm.com/products/snapdragon-425-mobile-platform
, the Snapdragon 425 includes cellular modem RF, WiFi, Bluetooth and GPS.
Does that mean that it does not need a baseband CPU, ...
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Modelling digital DLL for CDR for simulation/modelling purposes only
I have done a Verilog module for clock and data recovery (CDR) using DLL ( this is for simulation purposes only) I used Modelsim for simulation. In the transmitter (Tx), I only have a (clock that has ...
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What are the display parameters for a TFT LCD?
I want to use this display with a system on module running Linux. I need to configure the device tree below with the parameters for the display so it will work properly. A description of these ...
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Why do we use a gray encoded signal by 2 stage flip-flop in asynchronous FIFO to avoid race-condition issue? [duplicate]
In the FIFO design, to compare the rptr and wptr, we are feeding one signal into another clock domain.
The rptr which is coming from the slow clock domain to faster one can be synchronized with sync ...
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