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Questions tagged [cpu]

CPU is the abbreviation for central processing unit. Sometimes referred to simply as the central processor, but more commonly called processor

-2 votes
1 answer
108 views

What are the CPU architectures for the most common general purpose devices (i.e., Android, Windows/Linux PC, RaspberryPi etc.)? [closed]

Wikipedia lists over 45 different Instruction Set Architectures. I would bet that most of those are listed for legacy purposes, but I barely have any knowledge on the subject (I'm not even sure if ...
Fabio Freitas's user avatar
1 vote
4 answers
273 views

Is the maximum number of outstanding load instructions limited by the CPU architecture or the program?

I'm reviewing some lecture slides and had a question on the following slide : Assumptions (8 clocks to transfer data) Up to 3 outstanding load requests. The slide is illustrating that the number of ...
Carpetfizz's user avatar
0 votes
2 answers
173 views

Complicated task scheduling architecture

So I want to make an application in which a user will hit an endpoint to save a job model to storage that includes some metadata to perform a long computation against which will be offloaded to a ...
Malik Brahimi's user avatar
0 votes
1 answer
707 views

I want my Docker container to use more of the host's CPU resources

I have a DigitalOcean droplet on which I have deployed a Docker container (Docker version: 20.10.14), but my app is sometimes slow, therefore I would like to allocate more resources to it. The droplet ...
samdouble's user avatar
  • 243
1 vote
3 answers
546 views

Memory on multiple cores versus 1 core

I am running a program that, among other things, does some matrix multiplications, singular value decompositions and accessing matrix subsets on a very large data set (these are the lines of code that ...
Andy's user avatar
  • 19
1 vote
4 answers
2k views

Memory Alignment

I want to make sure I understand the concept referred to by alignment: Is it just a way of making sure that you never have a non-integer number of words? The wikipedia page says in order for an access ...
Hello's user avatar
  • 19
3 votes
1 answer
254 views

Benchmarking C# code - results

I watch this YouTuber's mostly excellent videos on .NET features (let's call him Nick). He more often than not uses Benchmark.net to demonstrate the differences in performance of different approaches ...
Martin Maat's user avatar
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1 vote
1 answer
96 views

Can we reliably use unaligned scalars on contemporary hardware?

Processors have come a long way in their handling of unaligned data - from crashing at the very notion of it, through suffering severe penalties, all the way to having almost no impact. I suppose it ...
dtech's user avatar
  • 723
33 votes
7 answers
8k views

Why do modern operating systems *ever* have perceptible input (keyboard/mouse) lag?

Sometimes computers stutter a bit when they're working hard, to the point where the mouse location freezes for a fraction of a second, or stutters intermittently for a few seconds. This sometimes ...
Paul Calcraft's user avatar
-2 votes
1 answer
175 views

What is the benefit of equipping a computer or smartphone with multiple CPU cores that differ in clock speed? [closed]

I've bought a samsung galaxy s21 ultra about a year ago. Today i was looking at the specs again and i noticed that the Samsung Exynos 2100 processor consists out of 1 single CPU core of 2.9 GHz, three ...
Maurice's user avatar
  • 133
-1 votes
2 answers
1k views

What happens when one thread is waiting to be executed while another is waiting for input?

Suppose I have two threads, A and B. A is waiting for input, while B is waiting to be executed. All other CPU cores are busy with CPU-bound tasks. What will happen to A?
moonman239's user avatar
  • 2,063
-5 votes
2 answers
148 views

Archival-quality future-proof pseudo-CPU architecture

Suppose we maintain a massive electronic library of texts/photos/videos etc., and want to ensure that these files are readable indefinitely long in the future. [Update] one of the major problems with ...
Ilya Zakharevich's user avatar
2 votes
0 answers
140 views

Branch Prediction: How does a correlative branch predictor select from the global history?

I am trying to understand how branch prediction works, specifically with regards to correlative branch prediction. I understand that in an (m, n) branch predictor, there are m branch predictors, with ...
Adam Lee's user avatar
  • 129
0 votes
2 answers
101 views

Efficiency of different Processors and GPUs

My question is, knowing everything there is to know about several systems(CPU and GPU stats, OS), is it possible to approximate when each system will finish a specific processing operation? And if it ...
kasra's user avatar
  • 131
-3 votes
3 answers
393 views

ALU and register relations

Does the ALU have its own memory or registers where it stores input operands etc. or does it only use CPU registers (that aren't only specifically used for ALU tasks)?
user737163's user avatar
1 vote
3 answers
2k views

How do binary numbers interact with the CPU and cause some action to take place? [duplicate]

EDIT: Perhaps what I am misunderstanding is that when it is said that the code we type gets turned into machine code of 0s and 1s. If these 0s and 1s are the abstracted representation of their ...
steez's user avatar
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-3 votes
1 answer
145 views

How to anticipate a software future where ARM (potentially) replaces x86 in server and PCs? [closed]

With the introduction of Apple M1 processor, ARM has stood up to be a capable competitor and an alternative to x86 processors. We can foresee a future where ARM captures considerable market share of ...
Shiva's user avatar
  • 113
-1 votes
1 answer
130 views

How to calculate the computing power gap of different CPUs

I want to compare the performance gap between the two machines, the main consideration here is memory and CPU. For example, the theoretical calculation peak of the CPU. Theoretical CPU peak = main ...
wei huang's user avatar
62 votes
10 answers
25k views

Does it ever make sense to use more concurrent processes than processor cores?

I've got some process in Go. Here's an example counting lines in text, though the question is meant to be far more general than this particular example: func lineCount(s string) int { count := 0 ...
TheEnvironmentalist's user avatar
6 votes
3 answers
904 views

How does an OS limit a program capabilities, if it's working directly with the cpu?

When a program loads into memory and starts running, the cpu loads each instruction from the code and executes the instruction based on the opcode and the arguments, so, the program interracts so to ...
FLUSHER's user avatar
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8 votes
9 answers
8k views

Why is multithreading not used everywhere?

Not almost, but all modern CPUs have multiple cores, yet multithreading isn't really that common. Why to have these cores then? To execute several sequential programs at the same time? Well, when ...
Martian's user avatar
  • 225
-4 votes
1 answer
113 views

Where on the 64bit memory of a PC would one byte end up?

I have a simple question I think. A typical pc with ram has a 64bit databus between the cpu and ram. Let's say the ram starts at address 0, and I write i byte to address 0. Now my question is, would ...
user avatar
3 votes
7 answers
3k views

Is it possible to update exactly 1 byte in RAM?

For example I have a static C++ array {'d', 'o', 'c', 's'}. And I have x86 architecture, with 32-bits length words. I want to replace letter c with g. As far as I understand, when we make a read ...
No Name QA's user avatar
-3 votes
2 answers
249 views

How specific is hardware optimization when building from source/how do I know?

How specific is hardware optimization when building from source and what should I look for in the documentation to decide if building for my hardware might be worth it? From threads like this one I ...
Stonecraft's user avatar
-3 votes
5 answers
1k views

Why can't we vertically scale a system infinitely?

When talking about scaling a system, it's often said that vertical scaling has limitations. So after a point, we need to scale the system horizontally. What are the limitations of: Main memory - ...
NPE's user avatar
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1 vote
2 answers
1k views

How to speed up my software development workflow? I'm using Visual Studio 2019 to build, compile, run tests for dotnet, C#, Docker containers, etc

I am primarily working with C#, dotnet and Visual Studio 2019 with extensions like Resharper enabled. Visual Studio with Resharper is a memory hog. I currently have the following PC at home where I ...
miniGweek's user avatar
  • 127
-2 votes
2 answers
3k views

How are electrons moved in processors/CPU? [duplicate]

During our class, he posed the question 'How are electrons moved by code' for our own reflection, the question seems to be vague but I assumed how are electrons moved in a processor/CPU since we were ...
Monsi's user avatar
  • 23
-2 votes
1 answer
701 views

Does accessing RAM from 2 threads double access time (synchronous access)?

As in topic. If i want to access RAM from 2 different threads, completly different cells in memory, do they queue and are sent asynchronously or queue? Lets say accessing memory from one thread (...
drszmatan's user avatar
3 votes
2 answers
1k views

How is it possible for a process to use less than 100% CPU?

I don't know too terrible much about the CPU, but I know it processes assembly instructions and that Windows can say that it is at anywhere from 1-100% usage. How is it possible for a program to use ...
Fishy's user avatar
  • 165
3 votes
1 answer
452 views

What are the restrictions for the CPU when it is in user mode?

I know that when the CPU is in user mode, it can't access all memory, it also can't execute some CPU instructions (called "privileged instructions" I believe). But are these two restrictions the only ...
Christopher's user avatar
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2 votes
3 answers
5k views

Comparison of build times on various hardware; why non-linear results?

Why do the compile times not vary significantly between different era CPUs, even though disk (NVMe vs. HDD) and CPU benchmarks vary significantly in performance? Why does disabling hyperthreading ...
casualcoder's user avatar
0 votes
2 answers
206 views

How did old OSs create or expand a segment in memory without issues?

On an 8086 CPU before the flat memory model had been adopted, when the OS wanted to create a new segment for a process, how did it know what virtual memory ranges were already covered by existing ...
Lewis Kelsey's user avatar
3 votes
4 answers
4k views

How to align on both word size and cache lines in x86

From what it sounds like, a 64 bit processor means aligning to 64 bits, which means if you have unicode utf-8 stored in there, each 8-bit chunk would take up 64 bits of space. That doesn't really make ...
Lance's user avatar
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-6 votes
1 answer
85 views

two processes with same execute time [closed]

Process A take 10 seconds to finish an execution. Process B take 10 seconds to finish an execution. Is it possible to take 5, 8, 15 seconds to finish an execeution if they run stimulately.
love's user avatar
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1 vote
2 answers
6k views

What is more efficient: Reading and parsing a large JSON file, or large CSV file?

I plan on using Scrapy to crawl a local website for a LOT of data and store it in a file. Then I plan to parse that file and put some of the data in a SQL database. Will my computer use less CPU and ...
Username's user avatar
  • 143
0 votes
4 answers
1k views

Does instruction length affect cycles per instruction?

ISAs define things like instruction lengths and the instructions themselves and there are some things that I do not understand. Does the instruction length (the amount of bits) affect the amount of ...
Ukula Udan's user avatar
2 votes
1 answer
2k views

What receives the output of the ALU?

I know that the Arithmetic Logic Unit (ALU of a processor performs arithmetic (and bitwise) operations and the result is stored as the ALU's output - but what component, device or software is actually ...
Ukula Udan's user avatar
9 votes
2 answers
8k views

How does a CPU load multiple bytes at once if memory is byte addressed?

I've been reading about CPUs and how they are implemented, and some big complex architectures (looking at you x86) have instructions that load from memory during one clock cycle. Since one address ...
DylanG's user avatar
  • 135
1 vote
2 answers
346 views

Increase processing use of Digital Signal Processor

I have a DSP (Digital Signal Processor) with a very well defined application, (this explication will be simplified) The DSP uses TDM (Time Division Multiplexer) frames to receive audio information, ...
user2982010's user avatar
7 votes
3 answers
7k views

What does "address space" means when talking about IO devices?

The following quote is from this page: While some CPU manufacturers implement a single address space in their chips, others decided that peripheral devices are different from memory and, ...
Christopher's user avatar
  • 2,039
2 votes
1 answer
273 views

What does "data bus control" mean?

This video mentions the following: What does it mean for the DMA controller to be granted the data bus control, does that mean the CPU cannot use the bus to access memory and IO devices until the DMA ...
Christopher's user avatar
  • 2,039
6 votes
3 answers
3k views

What happens to multiple parallel tasks running on a server when CPU hits 100% usage?

I am running 10 instances of the same executable where each executable is accessing a different 1/10 chunk of the total data that needs to be processed on a Windows Server 2012 R2. (Intel(R) Xeon(R) 2....
hkf's user avatar
  • 171
0 votes
1 answer
2k views

Feature of CPU needed to run Javascript fast

This is more of a Computer Engineering question, but what is the feature of a CPU to run Javascript fast? I use to access the internet with an AMD Phenom II with 6 cores and I could almost have as ...
Dehbop's user avatar
  • 169
73 votes
3 answers
65k views

How does a single thread run on multiple cores?

I am trying to understand, at a high-level, how single threads run across multiple cores. Below is my best understanding. I do not believe it is correct though. Based on my reading of Hyper-threading,...
Evorlor's user avatar
  • 1,550
2 votes
3 answers
387 views

Why are CPUs' datapaths multiple of 8?

Current and common processing units are 8, 16, 32, 64, 128, etc bit. Why are their datapath multiple of 8 ? Is this all linked to the fact that the industry has settled with a 8-bit byte ? The PDP-7 ...
Benoît's user avatar
  • 129
9 votes
2 answers
9k views

Separate Thread Pools for I/O and CPU Tasks

I've been puzzling over a good implementation for this for a while. I have a program that does a long-running I/O operation (downloading a file) and a long-running CPU operation (parsing its contents)...
ndm13's user avatar
  • 219
1 vote
2 answers
8k views

How to maximize the CPU usage of a Python subprocess?

I have a Python script launching a C++ executable. The C++ executable is a multithreaded program that usually takes several hours to run. The way the C++ code is written, it will run on all the ...
Chuque's user avatar
  • 179
12 votes
3 answers
2k views

Why do compilers typically only generate executables for the platform they are installed on?

I'm a C++ developer and in an attempt to better understand cross-platform development, I'm trying to get a better understanding of some implementation details of compilers and how exactly they create ...
Jason's user avatar
  • 469
3 votes
4 answers
20k views

The difference between accumulator-based and register-based CPU architecture?

I don't understand the difference between an accumulator-based CPU architecture and a register-based CPU architecture. I know x86 is register-based but it has an accumulator-like register. I only ever ...
Accumulator's user avatar
0 votes
2 answers
2k views

How to calculate how much of the CPU is used?

Say we have an interrupt that is generated once each time that 1024 bytes of network traffic arrives. Each interrupt takes 3.5 microseconds to process and the network speed is 100Mb.We want the ...
user63210's user avatar

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