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-5 votes
2 answers
148 views

Archival-quality future-proof pseudo-CPU architecture

Suppose we maintain a massive electronic library of texts/photos/videos etc., and want to ensure that these files are readable indefinitely long in the future. [Update] one of the major problems with ...
Ilya Zakharevich's user avatar
9 votes
2 answers
8k views

How does a CPU load multiple bytes at once if memory is byte addressed?

I've been reading about CPUs and how they are implemented, and some big complex architectures (looking at you x86) have instructions that load from memory during one clock cycle. Since one address ...
DylanG's user avatar
  • 135
2 votes
3 answers
3k views

Source of loading value to the register or memory location

When we load a register or memory location with a value (e.g. MVI 3A or MVI 53), what initializes register or memory location with that specific value? It is the CPU who performs the initialization, ...
Lucenzo97's user avatar
  • 293
1 vote
3 answers
2k views

Operation excution in terms of clock cycles

Typically for a single instrcution, 6 machine cycles are needed: FETCH instruction DECODE instruction EVALUATE ADDRESS fetch OPERANDS EXECUTE oepration STORE result My concern is regarding the fifth ...
AhmedWas's user avatar
  • 147
6 votes
1 answer
3k views

Developing a compiler for a self made CPU Architecture

Recently ive been consumed by creating my own simple CPU architecture that at some point could be easily implemented in hardware (No FPGA, but actual Logic Gate circuits). Naturally to fulfill this ...
MAM's user avatar
  • 171
5 votes
3 answers
23k views

Is there still any value in learning assembly languages today? [closed]

Specifically for a game programmer. If you really needed some assembly routines you could look for help, whereas back in the 80s/90s it was one of the mainstream languages. I read that compilers can ...
graham's user avatar
  • 173
3 votes
3 answers
3k views

How Byte loading/storing is implemented By the CPU?

I know that in 32bit machine, cpu read from memory 32bits at a time. since the registers in this case is 32bit in size too, I can understand how this works. What I don't understand is how the cpu ...
AlexDan's user avatar
  • 149