All Questions
Tagged with cpu operating-systems
9
questions
33
votes
7
answers
8k
views
Why do modern operating systems *ever* have perceptible input (keyboard/mouse) lag?
Sometimes computers stutter a bit when they're working hard, to the point where the mouse location freezes for a fraction of a second, or stutters intermittently for a few seconds. This sometimes ...
- 449
6
votes
3
answers
904
views
How does an OS limit a program capabilities, if it's working directly with the cpu?
When a program loads into memory and starts running, the cpu loads each instruction from the code and executes the instruction based on the opcode and the arguments, so, the program interracts so to ...
- 176
0
votes
2
answers
206
views
How did old OSs create or expand a segment in memory without issues?
On an 8086 CPU before the flat memory model had been adopted, when the OS wanted to create a new segment for a process, how did it know what virtual memory ranges were already covered by existing ...
- 141
7
votes
3
answers
7k
views
What does "address space" means when talking about IO devices?
The following quote is from this page:
While some CPU manufacturers implement a single address space in their
chips, others decided that peripheral devices are different from
memory and, ...
- 2,039
3
votes
4
answers
676
views
Is it possible for a computer system to have constant/zero CPU load?
For example, a simple program in a simulated environment that waits for user input seems to be doing no work, so I guess it uses CPU only for the time.
I'd like to know if computer systems (that don'...
- 39
2
votes
2
answers
1k
views
Compiling and deploying a C program to an MCU running an RTOS
Please note: Even though I'm specifically talking about an RTOS called Embox here, and even though I'm talking about AVR/ARm, I think this question can be answered by anybody whose ever done a fair ...
- 4,890
2
votes
1
answer
206
views
Compiling and deploying RTOS to an MCU
Please note: Even though I'm specifically talking about an RTOS called Embox here, and even though I'm talking about AVR/ARm, I think this question can be answered by anybody whose ever done a fair ...
- 4,890
3
votes
1
answer
729
views
Translation Lookaside buffer - Lookup By Page Size
I am having a hard time finding documentation that explains precisely how the various TLB caches are used in modern processors.
Most modern processors have separate TLBs for code/data. That in itself ...
0
votes
2
answers
2k
views
Multi-level paging tables
Referring to the image here:
From http://en.wikipedia.org/wiki/File:X86_Paging_4K.svg
Could somebody please explain something for me? I don't get exactly how this works. As I understand it the page ...
- 1,469