Questions tagged [rise-time]
Anything related to the rise time of a signal. The rise time is a parameter used to characterize abrupt transitions in a signal waveform. It is usually defined as the time needed by the signal to go from the 10% to the 90% of the level it attains at the end of the transition.
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Trying to figure out rise/fall times for different load conditions
I have a device that requires a certain rise/fall time for its input clock. It specs a .7ns rise and fall time with a 20% to 80% measurement at a Cin=6pf. I should note that the spec rise/fall time ...
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Relation between rise and fall times and capacitance
So I'm currently reading the datasheet of the Motorola 68hc000 CPU and I want to be able to estimate how many devices I can plug to the bus directly before I encounter issues.
So first things first, ...
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Rise time to an input
A device trigger input requires 1 V pulse (can stand up to 6 V) and has 0.5 V threshold voltage. Now if I apply a 5 V pulse with 10 ns rise time, how can I estimate the time it takes a rising edge to ...
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Measuring rise time with spectrum analyzer
Is it possible to measure the rise time (range 100ps-1ns) of a square wave signal with a spectrum analyzer (my oscilloscope has 100MHz bandwidth only)? My model is Rigol 3030N (9kHz-3GHz).
My idea is ...
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Understanding CLoad of a gate driver and the Cgate of an SiC MOSFET
I have selected an SiC MOSFET (UJ3C120040K3S) for my pulsed power application. My rise and fall time requirements are both 20 nS. My gate drive voltage will be 15 V. Based on the total gate charge ...
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Slow rise time in power supply
Does power supply slow rise time affect the UVLO start threshold voltage to turn on the IC (tps54316mpwprep)?
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Power Supply rise time and configuration
Reset managment:
from HW checklist and datasheet of USB2517 (page 48), is required a rise time for the 3V3 maximum of 400us. In our case it will be above 1ms.
In this case, is it necessary to use a ...
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What happens if rise time specification is not met
I have a design where an NXP i.MX8M nano CPU has a KSZ8081RNAIA Ethernet Phy connected.
During prototype testing, we found now that the supply voltage rise time provided by the CPU PMIC (NXP PCA9450B) ...
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MOSFET Gate Resistor Problem in CHG, DSG pins
I am trying to design a BMS circuit by using BQ77915 . My charge and discharge mosfets are CSD18534KCS. They are only using for switching. The problem is BQ77915 datasheet says for gate resistors of ...
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In an RC circuit, how do you explain the fast rise of voltage at a point close to source? (Weak pull up)
In the above figure, the voltage at the intermediate point rises quickly whereas the voltage after R2 is increases slowly ( as governed by the capacitor voltage.)
I am not getting the intuitive ...
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Output with programmable rise time
I am tinkering with a device to generate pulses for a measurement setup.
No need to buy it: Just wondering how one would implement it.
Idea:
Device generates a square-wave (Vpp and DC-offset) output ...
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Will the LVDS signal rise time improve after a counter IC?
I want to improve an LVDS signal's rise and fall time. With a Cyclone III FPGA, the LVDS signal has a 500 ps rise and fall time.
If I apply these signals to a counter/divider IC like the SY100EP33VKG ...
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Are there any published values for GPIO slew rate or rise/fall times on ESP32?
Are there any published values for GPIO slew rate or rise/fall times on ESP32? I had a look at the datasheets and couldn't find any. I also couldn't find any measurements elsewhere. Have Espressif ...
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LTspice capacitor bug?
I know that capacitor slows the rise of voltage, but why is this not happening in the LTspice simulation?
I got the input voltage at the output instantly.
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How to speed up rise time on logic shifter?
I am trying to boost a 3.3V data signal to 5V, and I'm using a logic shifter to achieve that. Basically, I'm trying to drive WS2813 LEDs, and the data line needs something close to Vdd (5V) to read ...
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