Skip to main content

Questions tagged [manufacturing-process]

The tag has no usage guidance.

0 votes
0 answers
136 views

How can a designer be sure to authorize only legit ICs? How is performed? How are cloned ICs prevented to be activated?

The above diagram is from the IC Activation (locking/unlocking) slide of Fighting against theft, cloning and counterfeiting of integrated circuits by Lilian Bossuet Associate Professor, CNRS Chaire of ...
allexj's user avatar
  • 55
4 votes
0 answers
45 views

Populating MOLEX receptacles at industrial scale

I am a manufacturing engineer charged with implementing process improvements that reduce the total time to build an article. Our volume is such that a one minute reduction in labour results in £1K-£2K ...
placebo_me_please's user avatar
6 votes
3 answers
227 views

Behaviour of uninitialised RAM in an ASIC

This is a question for anyone with experience designing or with a deep knowledge of volatile memory in an ASIC. E.g. chip designers or silicon process engineers. We are using the ET1200 EtherCAT ASIC (...
Rocketmagnet's user avatar
  • 27.5k
6 votes
1 answer
136 views

Is BiCMOS still a popular technology?

A Google search has not yielded much fruit when it comes to this question, but I'm wondering if BiCMOS is still a reasonably popular technology (relative, of course, to any other non-CMOS technology). ...
EE18's user avatar
  • 1,161
8 votes
3 answers
2k views

What shapes can IC dies be?

I know an IC die can be cut into a rectangular shape. Apparently triangles and rhombuses are also possible, but not used. What other tesselations can they be cut into?
Jacob Krall's user avatar
0 votes
1 answer
54 views

Unusual Transconductance Equation

I am a math-heavy electronics noob, and I was reading a paper when I came across this equation: $$g_m=\frac{2 I_D}{\left(V_{G S}-V_{T H}\right)}\left[1-\frac{1}{2} \frac{\theta_1\left(V_{G S}-V_{T H}\...
Thomas Pluck's user avatar
2 votes
2 answers
148 views

Lifting Pins on SMT RJ45 Connector

I'm running into an issue with a specific RJ45 SMT connector where the I'm getting at least 1 pin lifting on >50% of the boards that run through our reflow oven. The rest of the components on the ...
timroberts's user avatar
1 vote
1 answer
56 views

Electronics Manufacturing Engineers: What needs to meet IPC-6012 the finished copper or the starting copper foil?

I have a PCB that has a finished copper thickness of 1 oz on all layers and must meet IPC-6012 requirements for Class 2. Does this mean that the manufacturer can start with 0.5 oz copper foil then ...
AgentXq's user avatar
  • 111
0 votes
1 answer
93 views

Long term availability of WS2812B or any Neo-pixel

I am considering the use of Neo-pixel or WS2812B components in a project that we are planning to run for the next ten years with mass-scale production. I am curious about the feasibility of sourcing ...
Sohaib Qamar's user avatar
3 votes
3 answers
390 views

A good method to clamp PCBs down for bed of nails fixture?

I would like to build a bed of nails fixture with pogo pins. Is there a good method that works to hold down a PCB that is releasable and easy to pop a PCB in and out of the fixture?
Voltage Spike's user avatar
  • 84.8k
0 votes
2 answers
153 views

What are the primary industrial uses of gallium and germanium in electronics?

After the "neon shortage" struck I asked What are the ways in which semiconductor-grade neon is critical for manufacturing? and the answer(s) turned out to be quite informative. Al Jazeera's ...
uhoh's user avatar
  • 3,439
7 votes
2 answers
991 views

Why are the challenges in using SRAM over DRAM for main memory?

Historically, when compared to DRAM (dynamic ram), SRAM (static ram) is more expensive with a lower density, but it's much faster and more efficient. As a result, SRAM is reserved for devices, such as ...
user148298's user avatar
  • 2,397
1 vote
0 answers
46 views

Why does Backside Power Distribution work for high speed CPUs?

Several upcoming or future CMOS process nodes are said to offer some kind of backside power delivery for Silicon CMOS transistors, so the precious area in the lower metal layers is freed up for signal ...
tobalt's user avatar
  • 22.5k
2 votes
1 answer
177 views

Why do JFET use buried channels?

All sketches of JFET construction that provide an actual 3D impression suggest that the channel is buried, e.g. here. I imagine that the formation of such a channel geometry requires at least two ...
tobalt's user avatar
  • 22.5k
5 votes
3 answers
2k views

Question on "Parts should be used within 5 days after opening." statement on component shipping package

I've been given the task of verifying a batch of ICs from a chinese broker, to see that the chips the company has bought are what the broker claims they are. The package we've received looks like this,...
Lars Petersson's user avatar

15 30 50 per page
1
2 3 4 5