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6 votes
3 answers
224 views

Behaviour of uninitialised RAM in an ASIC

This is a question for anyone with experience designing or with a deep knowledge of volatile memory in an ASIC. E.g. chip designers or silicon process engineers. We are using the ET1200 EtherCAT ASIC (...
Rocketmagnet's user avatar
  • 27.5k
0 votes
1 answer
111 views

Standard cell design flow in an ASIC design flow

I have a question regarding the standard cell design flow in an ASIC design flow. That being said I understand what a gate array design flow is. It being more or less a fixed logic FPGA. Structured ...
patvax's user avatar
  • 103
3 votes
3 answers
2k views

What material(s) are used in IC's as insulating layers between metal layers?

This question and the answers hits close to the topic. One picture shows it as SOD. Silicon-oxide dielectric? I'm aware that around/within the transistor, silicon oxide is grown for insulation where ...
horta's user avatar
  • 12.9k