User EE18 - Electrical Engineering Stack Exchange

20 votes

10 answers

6k views

What do we mean when we say something is done "in hardware" versus "in software"?

asked Feb 24 at 23:59

11 votes

4 answers

3k views

The Intuition for RLC circuits

asked Jan 15, 2020 at 15:07

9 votes

4 answers

2k views

What is the "problem" with directly coupled amplifiers?

asked Jan 22 at 19:31

8 votes

5 answers

1k views

What is the difference between a tristate buffer and a transmission gate?

asked Dec 9, 2023 at 22:58

6 votes

9 answers

9k views

First-Order Circuit that Looks like a Second-Order Circuit

asked Apr 10, 2020 at 19:14

6 votes

1 answer

136 views

Is BiCMOS still a popular technology?

asked Jan 20 at 23:14

6 votes

8 answers

3k views

Why are only 3 of 6 single-transistor amplifier configurations useful?

asked Dec 15, 2023 at 14:17

5 votes

4 answers

1k views

Why do we usually operate well into strong inversion?

asked Dec 15, 2023 at 18:27

5 votes

4 answers

998 views

Can a linear amplifier have finite bandwidth?

asked Sep 17, 2021 at 12:29

4 votes

2 answers

351 views

Transistor biasing in integrated versus discrete circuits

asked Jan 27 at 23:25

4 votes

2 answers

838 views

Why are drain and source not actually perfectly symmetric?

asked Jan 13 at 19:24

4 votes

2 answers

397 views

Why can't you mix edge signals with level signals in SystemVerilog for synthesis?

asked Feb 8 at 17:15

3 votes

2 answers

398 views

How do void functions get their results "out" in and more on functions and tasks?

asked Feb 3 at 15:14

3 votes

1 answer

145 views

Why are the "rules of combinational composition" useful?

asked Feb 5 at 18:05

3 votes

3 answers

351 views

Is assembly microarchitecture dependent?

asked Dec 13, 2023 at 22:46

3 votes

1 answer

290 views

How does this logic gate naming convention work?

asked Dec 12, 2023 at 16:17

3 votes

2 answers

322 views

How many bits are needed to "fully capture" the addition of two binary integers?

asked Dec 10, 2023 at 19:21

3 votes

1 answer

221 views

Why do PMOS suffer a worse body effect than NMOS?

asked Nov 21, 2023 at 19:30

3 votes

2 answers

488 views

Why does this Verilog code work without "wire" statements?

asked Oct 3, 2023 at 14:53

2 votes

1 answer

2k views

How to label waveform plots in LTspice under a .step directive?

asked Apr 1, 2022 at 0:07

2 votes

3 answers

159 views

Recovering a Differential Equation From the Transfer Function of a Cascaded System

asked Feb 27, 2020 at 17:59

2 votes

3 answers

167 views

Why doesn't voltage on one terminal of a capacitor matter?

asked Oct 19, 2023 at 18:27

2 votes

1 answer

547 views

On a method of clock gating with a latch

asked Oct 26, 2023 at 14:56

2 votes

0 answers

53 views

Why does the body effect result in these \$V_{OH}\$ and \$V_{OL}\$ values?

asked Dec 9, 2023 at 23:19

2 votes

6 answers

256 views

Why is an offset voltage and an offset current sufficient to represent mismatches in a differential amplifier?

asked Nov 29, 2023 at 22:57

2 votes

2 answers

200 views

On different well processes (reasons)

asked Dec 18, 2023 at 17:22

2 votes

1 answer

240 views

Understanding the rigorous definition of hold time

asked Jan 9 at 16:01

1 vote

5 answers

262 views

Why am I concluding that the emitter-degenerated CE stage is unilateral?

asked Jan 28 at 0:04

1 vote

1 answer

122 views

Why doesn't side diffusion raise resistance of an integrated resistor?

asked Jan 18 at 14:54

1 vote

1 answer

67 views

Limit of applicability of "quasistatic"/capacitive picture of devices

asked Jan 18 at 15:26

Stack Exchange Network

89 Questions

What do we mean when we say something is done "in hardware" versus "in software"?

The Intuition for RLC circuits

What is the "problem" with directly coupled amplifiers?

What is the difference between a tristate buffer and a transmission gate?

First-Order Circuit that Looks like a Second-Order Circuit

Is BiCMOS still a popular technology?

Why are only 3 of 6 single-transistor amplifier configurations useful?

Why do we usually operate well into strong inversion?

Can a linear amplifier have finite bandwidth?

Transistor biasing in integrated versus discrete circuits

Why are drain and source not actually perfectly symmetric?

Why can't you mix edge signals with level signals in SystemVerilog for synthesis?

How do void functions get their results "out" in and more on functions and tasks?

Why are the "rules of combinational composition" useful?

Is assembly microarchitecture dependent?

How does this logic gate naming convention work?

How many bits are needed to "fully capture" the addition of two binary integers?

Why do PMOS suffer a worse body effect than NMOS?

Why does this Verilog code work without "wire" statements?

How to label waveform plots in LTspice under a .step directive?

Recovering a Differential Equation From the Transfer Function of a Cascaded System

Why doesn't voltage on one terminal of a capacitor matter?

On a method of clock gating with a latch

Why does the body effect result in these \$V_{OH}\$ and \$V_{OL}\$ values?

Why is an offset voltage and an offset current sufficient to represent mismatches in a differential amplifier?

On different well processes (reasons)

Understanding the rigorous definition of hold time

Why am I concluding that the emitter-degenerated CE stage is unilateral?

Why doesn't side diffusion raise resistance of an integrated resistor?

Limit of applicability of "quasistatic"/capacitive picture of devices