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Questions tagged [biasing]

The setting of the DC operating point (the DC voltage or current about which the instantaneous value might vary) of an electronic component that processes time-varying signals.

0 votes
0 answers
41 views

Simplest JFET front end to A/D converter

This is regarding a cheap Pmod I2S2 ADC and DAC (connected to an STM32F407G-DISC1) that uses a Cirrus CS5343 ADC. Now, as best as I can tell from the CS5343 data sheet, the \$ V_{PP} \$ of the input ...
robert bristow-johnson's user avatar
3 votes
4 answers
784 views

Why should the Vce be half the value of the supply source?

For a BJT amplifier biased to operate in the active region; I think that the statement "the voltage Vce is half the value of the supply source" is incorrect. Because I know that such a thing ...
manrupe's user avatar
  • 73
0 votes
0 answers
52 views

Noise observed in QPA2935

I am using a "Pulsed biasing board" which provides the drain signal and gate signal to a power amplifier. I am interfacing the same with QPA2935 driver amplifier(DA) Please find the ...
Sahasra Vaiishnavi's user avatar
2 votes
0 answers
65 views

How to calculate the output impedance of a gain-boosted biasing circuit [closed]

I've been working on calculating the output impedance \$R_{Out}\$ โ€‹of the gain-boosted biasing circuit shown in picture, where all transistors are in the saturation region. While I understand the ...
mouin's user avatar
  • 31
1 vote
0 answers
49 views

Simple cascode biasing problem in an electronic circuit

use variable (๐ผ_๐‘…๐ธ๐น, ๐‘‰_๐‘‡๐ป,๐‘‰_๐บ๐‘†) to express the range Assume that all 4*(W/L)1= (W/L)2= (W/L)3= (W/L)4= (W/L)5= (W/L)6 All TRs are under saturation region Assume that M2 is under subthreshold ...
mouin's user avatar
  • 31
1 vote
0 answers
35 views

Load is switching between 0V and overcurrent in the pulsed drain biasing circuit for a Power Amplifier

Given below is a block diagram of an evaluation-board. It is a pulsed biasing board to a PA. It is designed to produce a pulsed-drain and pulsed-gate signal for the biasing of GaN Power Amplifiers. I ...
Sahasra Vaiishnavi's user avatar
-1 votes
3 answers
87 views

How can we set the exact current through feedback resistor Rf1 to achieve 0V output at DC?

In this type of circuit, how can we set the exact current flowing through the feedback resistor Rf1 to set the output at 0V at <...
hana's user avatar
  • 240
0 votes
1 answer
115 views

Is it possible to design a circuit with an op-amp that always keeps the output voltage 1 volt higher than the input voltage?

Is it possible to design a circuit with an op-amp that always keeps the output voltage 1 volt higher than the input voltage? For example, if the input is 1V, the output should be 2V; if the input is ...
SUHAS DADABHAU KASUTE's user avatar
1 vote
1 answer
40 views

Bias condition of parallel silicon PN diode circuit

In the following question, D1 is operated in forward bias condition. Then the voltage across D1 is 0.7 V. Then the voltage across D2 also 0.7 V; but no current flows through D2. Then what is the ...
madhuranga ishaka's user avatar
3 votes
1 answer
80 views

Avoid cross talk between recording electrodes

I am trying to compare two record signals coming from two INA amplifiers simultaneously. Both amplifiers are actually recording the same signal, just with different recording electrodes. We are ...
Potatoconomy's user avatar
0 votes
0 answers
144 views

How to minimize modulated signal clipping in an amplifier circuit with improper Q1 biasing?

I'm currently working on two amplifier circuits designed to process modulated signals. While the circuit on the right operates as expected, both theoretically and practically, I'm facing an issue with ...
Kaspars's user avatar
  • 17
4 votes
2 answers
351 views

Transistor biasing in integrated versus discrete circuits

I have this vague sense that in the design of analog integrated circuits we tend to think of or do biasing by fixing the DC currents of amplifying stages as opposed to the DC voltages (as seemed to be ...
EE18's user avatar
  • 1,161
0 votes
0 answers
126 views

Bias up and down sequence of a GaN power amplifier

I am trying to build a biasing sequence circuit for a GaN power amplifier. The GaN power amplifier I am using has a particular bias-up and bias-down sequence as shown below: The figure below is a ...
Sahasra Vaiishnavi's user avatar
0 votes
1 answer
134 views

Differential amplifier op-amp schematic connection and DC biasing

I have a differential IF (intermediate frequency) signal generated by an ADL5801 RF mixer. Stage 1: the signal is amplified before active filtering and it has LC LPF in the beginning for filtering ...
Cenk's user avatar
  • 75
5 votes
2 answers
518 views

How do I choose a transistor for a VBE multiplier?

I am currently designing a 150 W audio power amplifier for 12 ohms, so 60 V peak to peak and 5 A. I'm using a C5198/A1941 pair for AB amplification with D669/B649 in a Darlington configuration so I ...
Anthox's user avatar
  • 131

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