All Questions
Tagged with vlsi integrated-circuit
35
questions
6
votes
2
answers
750
views
How to decide sizes for transistors in a design? What does it mean to design an IC?
I have recently started designing analog ICs as part of my academic work. So far all I do is take topologies given in textbooks or papers and try to design them in the PDKs available at my university. ...
15
votes
1
answer
2k
views
What is the standard procedure for analogue IC tapeout?
This is probably a very broad question and I will try to be more specific. I'm asking this question to get a sense of the gap between my knowledge and a 'successful' tapeout, as I've heard many people ...
1
vote
1
answer
256
views
On different well processes (fabrication process)
My textbook (Weste and Harris's CMOS VLSI Design) is trying to explain to me the nature of fabricating wells in the twin-well and triple-well processes. My question here is about how we can use so few ...
0
votes
1
answer
51
views
Capacitances for inverter delay calculations
In CMOS VLSI DESIGN, Neil WESTE, page 144.
"The source-to-body capacitors Csbn1 and Csbp1 have both terminals tied to constant voltages and thus do not contribute to the switching capacitance. It ...
0
votes
1
answer
478
views
Why do we use LDD technique in IC fabrication technology?
Why do we use LDD(lightly doped drain) in IC fabrication technology?
In the "silicon VLSI technology" book, was mentioned that this is in order to create a voltage drop in drain region. So ...
2
votes
5
answers
702
views
How do I get more clarity on the meaning of "integration" in VLSI?
VLSI and advances in our understanding of semiconductor physics has made it possible to have enormous computing capacity at our fingertips.
However, I never really understood what "integration&...
0
votes
1
answer
130
views
Why is the gamma term missing in the first case of single transistor example?
This is the video.
How is the gamma term present in one case and absent in another?
0
votes
1
answer
777
views
Which technique is used to create high value resistance inside a IC?
Various ICs have resistances inside them. For example, AVR microcontrollers have an internal 10k pull-up resistor inside them. Which kind of technique is used to design these resistors? If I want to ...
3
votes
2
answers
4k
views
Which software is used to design (and simulate) IC?
Currently I'm using Proteus to design and simulate all of my schematics. Is there any (free) software for designing and simulating ICs? I searched the Internet and found Cadence and Glade Thanks!
3
votes
3
answers
6k
views
Why does decreasing the CMOS supply voltage also decrease the maximum circuit frequency?
In CMOS circuit design, we know dynamic power is proportional to \$V_{dd}^2Cf\$, so the best way to reduce dynamic power is to reduce \$V_{dd}\$.
However, according to the textbook,
Keeping the same ...
2
votes
2
answers
577
views
Demo of designing a modern CPU in Verilog/VHDL [closed]
Please help me understand how such huge and complex devices like modern CPUs' are designed - would it be possible to see an example of some final circuit with billions of transistors made with Verilog/...
-1
votes
1
answer
1k
views
What is the difference between operating temperature and junction temperature of an IC?
On Wikipedia, I found that these are the same. However, in datasheets I find two different temperature ranges.
Can somone explain the difference to me please?
7
votes
2
answers
1k
views
How do the VLSI design rules for finFET differ from traditional MOSFET/CMOS design?
I'm taking an intro to VLSI class right now and we're learning the design rules for laying out chips on a 600 nm process. This was the state of the art in the early 90's so it should be a little out ...
3
votes
1
answer
897
views
What exactly do the well taps in MOSFETs do and how?
Do they affect the flow of charge carriers or charge concentrations at all in the device? How so? Up to this point I've tried to visualize the effects that the various doped areas had on device ...
0
votes
0
answers
190
views
CMOS vs BiCMOS technology nodes comparison
I am trying to make a comparison between several technology nodes. More specifically I want to compare 28nm, 40nm, 65nm CMOS and BiCMOS processes. However I cannot find papers that compare some of ...