All Questions
Tagged with vlsi computer-architecture
11
questions
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69
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On understanding tradeoffs associated with pipeline depth
In Weste and Harris's CMOS VLSI Design, they write the following in the context of a discussion about how different levels of design abstraction interact but, to be clear, my question is about the ...
- 1,161
3
votes
3
answers
520
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Processor Design: Just how complex is a real CPU datapath?
We're doing a course on Computer Architecture, and the course project involves creating an ARM-based processor.
We're supposed to create the processor in stages, and add significant features in each ...
- 352
3
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4
answers
3k
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How do processor transistor counts keep increasing, without geometric scaling?
Reading into the history of the semiconductor industry and Moore's Law, and looking at the ITRS/IRDS documents, I understand that scaling down and modern node names (7nm, 5nm etc) are now "...
- 31
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2
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What is the origin of the "iso [frequency/voltage/power]" terminology?
In the VLSI and computer architecture world, it is common to hear terms like "iso frequency" or "iso power" when comparing the performance of different designs.
My understanding is ...
- 103
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3
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612
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Is there any memory cell that can store more than one bit? [closed]
SRAM, DRAM, Flash, EPROM - all of the memory cells contain one bit of data each. Is there any memory cell that can store more than one bit, e.g. 2 bits/4bits?
- 29
-1
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1
answer
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What are advantages of 1's complement over 2's complement in DSP? [closed]
I wanted to know about the advantages of 1's complement over 2's complement in DSP applications.
0
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1
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771
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How to reduce an ALU logic with the minimum logic possible? Its very challenging
Our professor wants us to reduce 8-function ALU (8 outputs) to a 4 out ALU that has the capability to implement all the 8 functions. We can use any gates(even AOI's), muxes, and can create our control ...
- 201
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2
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I need help with verilog code, I am in trouble?
I am basically setting different control signals for the ALU to perform operations in verilog. But I have tried all possible ways of writing what I want but in vain, can you help me out. How should I ...
- 201
1
vote
1
answer
189
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How do you reduce an 8 output ALU to a 4 or 3 output ALU?
I can implement the functions in the picture below, but then if I implement them independently, I would have 8 outputs to the mux. Our professors wants us to reduce the ALU to only 3 or 4 outputs, I ...
- 201
1
vote
1
answer
336
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How do you store A or B in a RAM of a CPU datapath?
I have an assignment to make a CPU, but am confused with how f_left and f_right are going to be used. I think they are to store ...
- 201
6
votes
1
answer
438
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Processor design: turning blocks on/off dynamically to save power?
I was wondering if this is possible and if it is done in current designs. Seemed like an interesting enough idea to me. Here's a little diagram I made to help try and explain:
So let's say I'm clever ...
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