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3 votes
1 answer
53 views

Voltage drop in NMOS inverter with enhancement load

In the enhancement load NMOS inverter, why is the voltage drop across M2 at least equal to Vth when VIN is low ? Is it because for M2 when VIN is low the voltages VGS = VDS, so VDS > VGS - Vth and ...
S214ky's user avatar
  • 63
1 vote
1 answer
64 views

Analyzing \$g_m\$ vs \$V_{in}\$ for a common source config

I had this doubt while going through the book "Design of Analog CMOS Integrated Circuits" by B. Razavi, if we are to plot \$g_m\$ vs \$V_{in}\$ for the above circuit, then we have \$g_m\$ =0 ...
wolff's user avatar
  • 13
0 votes
2 answers
122 views

How do you justify energy band bending in an unbiased MOS Capacitor?

Here is a MOS Capacitor: (Image source: Chapter 5 of Modern Semiconductor Devices for Integrated Circuits by Dr. Chenming Hu) Now lets consider the idea that the gate voltage is held at 0V, just like ...
McSuperbX1's user avatar
1 vote
2 answers
112 views

Why simulation of single NMOS/PMOS on LTspice has big difference with manual calculation using Level 1 Standard Parameters?

I am researching the mode of operation on PMOS and NMOS using Level 1 standard parameters. This is the information of the NMOS circuit to be designed. Using transistor model level 1 parameters, ...
CJ. T's user avatar
  • 41
0 votes
1 answer
54 views

How to interpret MOSFET connections and voltages

I have a few simple question about MOSFETs on how to interpret their symbols and how the pins and gate voltage are defined. • I see symbols with the Source shown on the top and Drain on the bottom, ...
McKendrigo's user avatar
0 votes
1 answer
47 views

Driving NMOS source with a separate power supply

I am trying to see whether I can turn on 28 V voltage rail from a 5 V input signal using an N-channel MOSFET (NMOS). I am using IRF530N for now which has a threshold voltage of 4 V. I just modeled it ...
nmr's user avatar
  • 133
1 vote
0 answers
25 views

A simple NMOS circuit simulation. Is there a way I can use KCL to find Id instead of doing Id equation?

I know the traditional way to solve this, you find Vgs then you try to find Id. But for this circuit, we already can figure out the current flowing through the 2K and 3K by doing KVL(assuming I1). Is ...
Pococurante Bird's user avatar
1 vote
1 answer
27 views

is Vov of a nMos always VGS - Vt?

Looking at this graph from Analog Circuit Design Discrete and Integrated by Sergio Franco, is it always true that Vov = VGS - Vt? or is this only true at pinchoff point?
user364328's user avatar
1 vote
1 answer
53 views

Reconciling High Drain Voltage with Typical V_BE Drop in nMOS+PNP IGBT Configuration

I'm examining two design methodologies for IGBTs (Insulated Gate Bipolar Transistors) and have encountered a puzzling issue regarding the drain voltage in the nMOS part of an nMOS+PNP IGBT ...
Qiu Junpeng's user avatar
0 votes
2 answers
242 views

What is the difference between an N-MOS FET and a tri-state buffer? [closed]

Is an N-MOS FET an equivalent of a tri-state buffer, where the source is the input, the gate is the enable, and the drain is the output?
Sny's user avatar
  • 109
0 votes
0 answers
55 views

Finding the mode of a MOSFET

I'm trying to determine the state of MOSFET \$T_1\$ in the following circuit: We are given that the threshold voltage \$V_\mathrm{T}\$ is \$1.5\ \mathrm{V}\$ and that every voltage source is \$5\ \...
Sam's user avatar
  • 205
0 votes
1 answer
125 views

How is the total gate charge of a MOSFET affected by the temperature?

For P- and N-MOSFETs, Vgsth will decrease (in absolute value) when the temperature rises. What is the impact of the temperature on the total gate charge for P- and N-MOSFETs? What is the order of ...
Rémi Baudoux's user avatar
0 votes
1 answer
119 views

How to make a power switch using MOSFETs?

I am stumped on trying to create a circuit that, through an enable of 3.3V will let +18V go to the load or prevent it from doing so. This is my current approach. I know the pullup resistor should not ...
Noel's user avatar
  • 1
2 votes
1 answer
233 views

How can I take parameters from power NMOS and power PMOS transistors and translate these into LTspice simulations?

I am trying to simulate NMOS and PMOS power transistors in LTspice, but I keep getting error messages about the NMOS being duplicate. Some of the earlier LTspice file is here. I am trying to have a ...
Stephen Elliott's user avatar
0 votes
0 answers
45 views

Inverting MOSFET drive circuit, is my scheme correct? [duplicate]

I am an automotive engineer student, building an inverting MOSFET driver (where a MOSFET drives and controls another MOSFET, Vin low -> Main MOSFET closed, Vin high -> Main MOSFET open). My ...
Duy Nguyen's user avatar

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