I am researching the mode of operation on PMOS and NMOS using Level 1 standard parameters. This is the information of the NMOS circuit to be designed.
Using transistor model level 1 parameters, calculate ID for an NMOS with the minimum W and L, VGS = VDS = 2.5 V and VSB = 0 V.
This is the result I have calculated using standard parameters manually.
The I_D calculated for my NMOS at minimum Width and Length (0.375u/0.25u) is 219.33uA. However, when I perform simulation on LTspice, the result seems to have a huge difference, compared to manual calculation.
This is my NMOS circuit on LTspice. Anyone can suggest how to solve this issue or any related settings so that the difference will not be so huge?