Why do fabs bother to print circuitry right up to the edges of a wafer when they know that the partial dies will be discarded later?

Question

Around the edge of a wafer (see image below) you will observe that there are many partial dies. It seems wasteful to use the lithography machine to print these partial dies because they will be discarded later. Surely the stepper motors that move the wafer could be programmed to stop at only those locations where a full die fits on the wafer. By doing so they would use the lithography machine more efficiently.

Why do they instead print dies right up to the edges?

In this CNBC video, you can see how a modern lithography machine steps the wafer to image dice sequentially. (Note: I am not affiliated with CNBC or any company in the chip fabrication industry)

Answer 1

I'm not sure of all the reasons, but one reason is that the stepped field doesn't always contain just one die: you might have four dice in a 2×2 arrangement per field, and it's usually worth it to get the one extra die even if the other three are all cut off.

In the extreme, you have the situation used in the largest mass-production scenarios (at least at larger process nodes; I don't know anything about modern process nodes), where the entire wafer is imaged at once with a single mask with an entire wafer's worth of dice on it. In that case, there's no benefit (that I'm aware of, anyway) to having the single mask contain dice off the edge of the wafer, but there's no harm either--you still only image the wafer a single time per mask, so it's not like you're adding extra time under the stepper.

And finally: They don't always! One of the fabs my workplace gets wafers made at doesn't image all the way to the edge; even when a field would have some full dice on it, if it's off the wafer edge, it's left off. This might just be because it's an experimental process, though (the device we're making is something weird that needs a custom process), and yield is already low enough (for the moment; we're working on that) that most of the dice closest to the edge are non-functional anyway, so ones even closer would definitely not work.

Answer 2

Put simply, the reticle has hundreds of copies of the die on it, and the reticle is a standard size for both big and small die sizes, meaning it would be more work to avoid doing photolith on the edges than to blindly do it.

This goes for all process layers, from doping to metallization. Edge dies are made simply because it would be more complicated not to.

Edit: I am an integrated circuit designer, and in college I worked in the photolith department of an IC fab. The last thing we do after design/layout/verification and before sending our reticles off to be manufactured is a final layer-by-layer visual inspection of the reticle, which contains huge arrays of the die at a fixed total size. The reticles are a fixed size, the photolith magnification is a fixed size, and so the photolith machines take a fixed amount of time to process a single wafer.

For a very big die size, you get more edge based yield loss. This is true for smaller wafers as well. Until they come out with a square silicon wafer, the best you can do is keep your die size small relative to your wafer size, at least in your production environment.

Edit 2: to expand on "Edge dies are made simply because it would be more complicated not to", I mean that if you did not step your reticle so it went all the way to the corner, you would either need to change your step pattern to avoid the corners entirely and suffer yield loss from the complete dies that would have been made from the inside corners of those reticles, or else design custom reticles that you had to swap in when you got to the edges of the wafer. The marginal cost of stepping a few extra fields is almost nothing (maybe a couple seconds total on the lith machine), and in general it gives you extra units, especially for small die size parts.

Answer 3

The explanation in this answer is plausible: a rectangle with the image of several chips is imaged at a time. A step is made if any chip imaged in the step would be fully on the wafer, very often resulting in chips partially on the wafer.

It's only when a step would contain no chip fully on the wafer that it is left an un-etched wafer area. This happens, but only rarely if the imaging area is large. The photo below is adequately explained if it's imaged 3 chips horizontally at at time, and 2 or 4 vertically (the right 3 columns are 16 chips high) ^{Source: Somos press communication}

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However that explanation does not seem to apply for the following picture, where the number of chips horizontally must divide 3 and 2, thus must be 1; and must be 1 vertically too.

^{Source: ST Microelectronics press material}

Answer 4

Imagine a sheet of paper on which you want to print multiple copies of a picture:

You could cut the paper into squares to fit the picture perfectly, but you'd waste some paper. Printing the picture right up to the edges might seem wasteful too, but it uses the paper more efficiently. Similarly, in semiconductor manufacturing, maximizing wafer utilization is crucial for cost-effectiveness, even if it means printing some partial dies.

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Circular wafers are the standard in the industry due to their efficient use of silicon material. Cutting the wafer into squares before printing the dies would leave significant unused silicon at the corners, increasing waste. Some semiconductor fabrication processes can be sensitive to the pattern density around the die. Printing partial dies creates a buffer zone, mitigating these edge effects and ensuring consistent quality for the usable dies.