Questions tagged [instruction-set]
For questions regarding the instruction sets of microprocessors.
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Why is the processor instruction called "move", not "copy"?
Many processors have an instruction called "move" (sometimes spelled MOV) which copies data from one location (the "source") to another (the "destination") in registers and/or memory. It does not do ...
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How does the LOADALL instruction on the 80286 work?
This undocumented instruction existed in the 80286 and, I believe, the 80386. I think it was added while debugging the chip, so the engineers could quickly put the processor into any state and test it ...
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What did the 8086 (and 8088) do upon encountering an illegal instruction?
Preface: This question does in part intersect with Use of undocumented opcodes, but targets especially the 8086 instruction handling.
I was reading Tanenbaum's "Operating Systems, Design and ...
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Why did the PDP-11 include a JMP instruction?
The PDP-11's program counter was addressable in two ways: as a general purpose register or as a memory location.
Still, the PDP-11's instruction set included separate instructions for moving a new ...
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How did the Z80 instruction set differ from the 8080?
The Zilog Z80 microprocessor, known for its use in the ZX Spectrum, was designed to be a backwards-compatible extension to the Intel 8080 processor. It introduced several new instructions to the 8080'...
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Why are first four x86 General Purpose Registers named in such unintuitive order?
On x86 the first four general-purpose registers are named AX, CX, DX, BX. It would be quite intuitive if their indices (those used in instruction encoding) were in alphabetical order, but instead of ...
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Why does the 6502 have the BIT instruction?
The 6502 has a bit instruction which
copies two of the bits into the N and V flags,
pretends to and the byte with the accumulator, but discards the result and only affects Z.
I'm having a hard time ...
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What happened to the SEV instruction on the 6502?
The 6502 has a group of opcodes which copy bit 5 from the opcode into one of the status flags.
(I know it's not implemented this way, but it looks as though the bit fields are: 2 bits to select the ...
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Executable ASCII files before x86?
I've known about a technique allowing to bootstrap arbitrary 16-bit x86 code from a subset of instructions representable as printable ASCII bytes since the early 1990s.
The first example of an ASCII ...
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Did any processor implement an integer square root instruction?
Has any processor ever implemented an integer square root instruction? Obviously, floating-point square root instructions are quite common, but I've never seen one specifically for integers.
One close ...
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How did the 8086 interface with the 8087 FPU coprocessor?
The 8087 has many instructions - too many, it seems, to be encoded as part of the 8086 instruction set. How did the Intel 8086 interface with an Intel 8087 FPU that a user added?
Consider the ...
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What is the relative code density of 8-bit microprocessors?
When RAM is at a premium, as it was in the old days, a greater code density of an instruction set can be a substantial advantage.
(Click saver: Code density refers loosely to how many microprocessor ...
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Why does the Z80 include the RLD and RRD instructions?
The Z80 has an instruction RLD, which apparently treats the lower 4 bits in the accumulator and the full 8 bits in (HL) as a twelve bit integer which it then rotates left by 4 bits. The carry flag ...
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What motivated the weird boolean instruction repertoire of the PDP-11?
The PDP-11 has seven dyadic instructions (I'm not counting the byte/word varieties separately), which take a full six bits for each of its operands. That's twelve bits to specify the operands, and ...
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Why does an instruction include the address of the next instruction on the IBM 650?
The IBM 650 seems to be a load-store machine. One advantage of a load-store machine is that the instruction can be shorter because there's less pressure to pack more information into it. But the IBM ...
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