All Questions
Tagged with instruction-set cpu
7
questions
3
votes
0
answers
185
views
What aspects of microprocessor ISAs have been patented?
A key objective of RISC-V was that every aspect of the ISA must be based on an expired patent. It was felt that this is the only truly reliable defense against patent lawsuits.
It is surprising that ...
- 63.1k
9
votes
6
answers
913
views
Would compare-and-branch have added an extra cycle on ARM-1?
The ARM-1 was an early RISC CPU, designed in 1986 (and even more typical of early RISC design constraints than the year would suggest, since Acorn didn't have the budget to pay for the latest process ...
- 63.1k
6
votes
2
answers
1k
views
What’s the last x86 CPU that didn’t place a limit on the size of a single instruction?
Although useless, it’s widely known the first Intel and derivative CPUs like the Z80 didn’t set a limit on the instruction size. This means that it was possible to fill the whole RAM/ROM with a single ...
- 322
1
vote
3
answers
1k
views
How do multi-byte instructions work?
Let's say you have a hypothetical 8-bit processing machine with 256 bytes of memory. You want to load the value stored in memory location $f2 into a register.
However, with a data bus of just 8 bits, ...
- 341
17
votes
5
answers
2k
views
Has there ever been a instruction set architecture that did not require instruction decoding at all?
I am studying basic principles of instruction set architectures and am considering what it would take to not have any instruction decoding at all. I.e., all the control lines of the computer would be ...
- 1,387
88
votes
9
answers
16k
views
Why is the processor instruction called "move", not "copy"?
Many processors have an instruction called "move" (sometimes spelled MOV) which copies data from one location (the "source") to another (the "destination") in registers and/or memory. It does not do ...
- 2,127
8
votes
2
answers
866
views
Instruction set support for multiplication with a constant
Before integer multipliers in silicon, several cpus had some support for multiplication. For instance SPARCv7 has the MULScc multiply-step instruction (several other cpus also have this).
As far as ...
- 323