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Questions tagged [instruction-set]

For questions regarding the instruction sets of microprocessors.

21 votes
8 answers
11k views

Uses for the halt instruction?

What was the halt instruction in early CPUs such as the Z80 and 8080 used for? Here's a description of the Z80 instruction: The HALT instruction suspends CPU operation until a interrupt or reset ...
Jet Blue's user avatar
  • 2,005
32 votes
6 answers
5k views

Why does the Z80 include the RLD and RRD instructions?

The Z80 has an instruction RLD, which apparently treats the lower 4 bits in the accumulator and the full 8 bits in (HL) as a twelve bit integer which it then rotates left by 4 bits. The carry flag ...
Omar and Lorraine's user avatar
9 votes
3 answers
2k views

Intel 8080 - Behaviour of the carry bit when comparing a value with 0

I'm in the process of writing an emulator for the Intel 8080. The description of the CMP instruction from Intel's 8080 programming manual (see page 20) says the following: The specified byte is ...
linuxuser's user avatar
9 votes
3 answers
839 views

Origin of the NZVC condition codes scheme?

The NZVC condition codes scheme, and corresponding set of 14 conditions for branches, is almost the only one in current ISAs that utilizes condition codes at all. The first computer I know that used ...
Netch's user avatar
  • 530
14 votes
1 answer
3k views

Nintendo 64 microcode format

The Nintendo 64 GPU ('Reality Coprocessor') had microcode that could be loaded at runtime. Several standard microcodes were supplied with the development kit, and the easily findable documentation ...
rwallace's user avatar
  • 63.1k
48 votes
4 answers
8k views

Why are first four x86 General Purpose Registers named in such unintuitive order?

On x86 the first four general-purpose registers are named AX, CX, DX, BX. It would be quite intuitive if their indices (those used in instruction encoding) were in alphabetical order, but instead of ...
Ruslan's user avatar
  • 1,454
14 votes
4 answers
2k views

Are there any articles elucidating the history of the POPCOUNT instruction?

Figuring out how many bits in a group of bits are set to 1, known as computing "population count", Hamming weight, or "bit summation", among others, has various applications. It is also fairly cheap ...
Leo B.'s user avatar
  • 19.4k
45 votes
8 answers
5k views

Executable ASCII files before x86?

I've known about a technique allowing to bootstrap arbitrary 16-bit x86 code from a subset of instructions representable as printable ASCII bytes since the early 1990s. The first example of an ASCII ...
Leo B.'s user avatar
  • 19.4k
22 votes
5 answers
2k views

PDP-11 instruction set inconsistencies

The wiki page PDP-11 architecture has a cryptic paragraph with no references or examples: Inconsistent instructions Over the life of the PDP-11, subtle differences arose in the implementation of ...
Leo B.'s user avatar
  • 19.4k
33 votes
2 answers
4k views

What is the relative code density of 8-bit microprocessors?

When RAM is at a premium, as it was in the old days, a greater code density of an instruction set can be a substantial advantage. (Click saver: Code density refers loosely to how many microprocessor ...
Leo B.'s user avatar
  • 19.4k
3 votes
0 answers
1k views

What are some programs known to take advantage of Intel MMX instructions? [closed]

Although MMX techology, introduced in 1997, is long superseded by SSE series of extensions, it's still included in every modern x86 CPU for backwards compatibility. What are some examples of ...
Ruslan's user avatar
  • 1,454
8 votes
1 answer
550 views

Was there ever a division instruction with sign of the remainder following the sign of the quotient?

A document about the precursor to ANDF (Architecture Neutral Distribution Format) mentions that two of its integer division/remainder primitives "are those generally implemented directly by processor ...
Leo B.'s user avatar
  • 19.4k
10 votes
1 answer
763 views

Timing and microcode in the PDP-11/40

I've been trying to figure out how the sequence of microcode instructions as described in the [schematics and ROM listing][1] in the PDP-11/40 (KD11-A Processor) relates to the timings given in ...
dirkt's user avatar
  • 28.4k
11 votes
3 answers
1k views

Was the PDP-11 coroutine instruction actually used?

In a typical description of the coroutine mechanism it usually mentioned that the PDP-11 instruction set provided a way to effect the coroutine switch by a single instruction, namely JSR PC,@(SP)+. ...
Leo B.'s user avatar
  • 19.4k
50 votes
3 answers
8k views

Why did the PDP-11 include a JMP instruction?

The PDP-11's program counter was addressable in two ways: as a general purpose register or as a memory location. Still, the PDP-11's instruction set included separate instructions for moving a new ...
Omar and Lorraine's user avatar

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