All Questions
35
questions
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FD-SOI Channel formation with fully depleted body
In an FD-SOI the body is undoped, which could be just an intrinsic semiconductor such as silicon. What I'm wondering is how the channel is formed in an FD-SOI when the body isn't doped at all. My ...
1
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0
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67
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Specific, practical examples of limits of logic gate fan-in?
I've been looking around for discrete, specific, and practical answers to the question "how many inputs can a (N)AND/(N)OR gate have?" as it relates to ASIC/VLSI/MOSFET/semiconductor ...
1
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2
answers
113
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Why simulation of single NMOS/PMOS on LTspice has big difference with manual calculation using Level 1 Standard Parameters?
I am researching the mode of operation on PMOS and NMOS using Level 1 standard parameters.
This is the information of the NMOS circuit to be designed.
Using transistor model level 1 parameters, ...
0
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0
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100
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Why does input threshold occur at the unique voltage at which both inverter MOSFETs are in saturation?
A relevant figure of merit for a CMOS inverter is the so-called input threshold voltage (no relationship to the threshold voltage of a given MOSFET) \$V_{inv}\$, defined as the voltage \$V_{in}\$ at ...
0
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1
answer
121
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Why doesn't body effect place limit on number of series transistors in CMOS network?
My textbook (Weste and Harris) asks the following:
Does the body effect of a process limit the number of transistors that can be placed in series in a CMOS gate at low frequencies?
It answers with ...
0
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1
answer
73
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Why is length scaling equivalent to series transistors?
In what follows, I am neglecting all non-idealities. All transistors are assumed to obey the first-order, long-channel IV characteristics.
My VLSI text (Weste and Harris) claims that, given these ...
3
votes
1
answer
343
views
Which type of mosfet used to make CMOS inverter?
My doubt is which type of mosfet used to make CMOS inverter Enhancement or depletion ?
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1
answer
130
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Why is the gamma term missing in the first case of single transistor example?
This is the video.
How is the gamma term present in one case and absent in another?
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1
answer
1k
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Calculating CMOS threshold voltage
I found this solution in a textbook, and I do not understand how they calculated Vth2 (typo written as 'Vth' at the bottom).
More specifically, where does the 2Vm come from?
I understand that Ids1 = ...
3
votes
2
answers
131
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Why use transistors at all for building gates? Alternatively: what about sub-transistor level optimization?
I was thinking about transistor design, and how the classic AND gate is composed of two transistors in series. See this image:
Now if we look at how a transistor itself is designed we can expand the ...
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2
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339
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MOSFET gate area?
I have a transistor with constant Vdd voltage but my W, L parameters are decreasing - what happens to my gate area?
2
votes
2
answers
475
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Setting parameters in SPICE models
I was trying to run some simulations on 45nm technology MOS transistors in Spice. I had a few beginner level questions regarding these models.
If a library says it is for 45nm process node, shouldn't ...
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1
answer
121
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MOSFET I/V characteristics. How does this mosfet conduct current?
I am currently studying the basics of CMOS design and came across the following problem in Razavi's textbook with respect to a NMOS transistor :
The question is simple:
Let \$V_{SB}\$ = 0 (source-...
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2
answers
2k
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Why is an N-type MOSFET used for low-side and a P-type for high-side switching?
Typically an N-MOSFET is used for low-side switching and P-type for high side switching. That's why transmission gates use both an N and a P-type MOSFET.
But I don't understand how a P-type for low-...
2
votes
2
answers
699
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What is meant by\$ I_{peak} \$current in CMOS inverter?
This is a snap from Chapter number 5 CMOS inverter, Digital integrated circuit by Jan M Rabaey .
I just wanted to know from where this \$I_{peak}\$ is measured. The direct path current exist till the ...