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0 votes
2 answers
751 views

How does logic 1 get passed through an NMOS pass transistor?

I'm studying pass transistors. One thing I came across in several of the books is that when an NMOS has a logic state HIGH and the input terminal (the schematic below) is also HIGH, the output ...
Akib Ahmed Ishan's user avatar
0 votes
2 answers
3k views

Deriving the NOT logic gate using PMOS logic

I recently started learning about Field Effect Transistors (FET's) and about the MOS circuit family. From my understanding NMOS is made from a p-type substrate and n-type source/drain, whereas the ...
Ski Mask's user avatar
  • 143
3 votes
1 answer
102 views

Semiconductor-level genetic programming

I was reading an old article about Adrian Thompson's work on using genetic programming to generate circuit solutions for simple tasks such as frequency differentiation. This got me wondering: every ...
Sidharth Ghoshal's user avatar
3 votes
1 answer
5k views

Why doesn't a capacitor connected to a MOSFET charge to VDD

If an nmos which has the gate and drain connected to VDD, and the source connected to a grounded capacitor, the nmos will start conducting and the capacitor will start charging as long as VDD > VTn (...
Blue7's user avatar
  • 1,655
0 votes
2 answers
313 views

What is the main Computer Memory Addressing Mechanism for Semi-Conductor Memory? [duplicate]

Most semiconductor memory is organized into memory cells or bistable flip-flops, each storing one bit (0 or 1). How exactly are the needed '1's or '0's taken from Memory? What mechanism or algorithm?
Sad CRUD Developer's user avatar