At RTDS Technologies, we’re always striving to improve the RTDS Simulator. This innovation takes many forms: improving the user experience in our simulation software, adding new features to support emerging issues in the power system industry, and updating our component library to enhance the accuracy and scope of the devices and phenomena being modelled. With the rapid development of HVDC technology worldwide, the need to accurately model HVDC systems and test their protection and control is greater than ever. Multi-terminal, multi-vendor, and multi-infeed systems, where achieving secure and consistent interoperability is a particular challenge, stand to benefit greatly from real-time simulation and hardware-in-the-loop (HIL) testing. New improvements to the MMC-HVDC modelling capabilities of the RTDS Simulator will support this critical application area.
The RTDS Simulator’s GTSOC V2 hardware [link to GTSOC V2 KB page] allows users to run several different firmwares in support of different simulation applications, including MMC-HVDC schemes. When the MMC firmware is active on the GTSOC V2, MMC-HVDC valve models run on the FPGA in parallel with the rest of the simulation on the central processing hardware; the two are connected with an optical fibre. The use of the FPGA enables highly detailed valve simulation which is appropriate for firing pulse-level control testing – in contrast with our average MMC-HVDC valve models, appropriate for higher-level control testing, which run on the central processor.
In the past, these FPGA-based MMC models included a travelling trave transmission line model with a travel time of 0.5 or 1 simulation timestep, to interface the valve model with the power system model running on the central processing hardware. If the simulation timestep increased, the length of this interface line increased accordingly, resulting in a larger shunt capacitance contribution to the simulation. Though this method of decoupling is well-established in real-time simulation, it should be used judiciously and can introduce inaccuracies to the simulation results at larger timesteps.
Recent updates to our MMC-HVDC models have removed this interface transmission line model, directly embedding the valve model into the surrounding network numerically. This removes the resulting shunt capacitance, improving the accuracy of simulation results. Furthermore, these models can be used in the Main timestep environment. Detailed, embedded MMC-HVDC simulation in Mainstep improves ease of use and hardware efficiency for users pursuing these applications. Both our GMMX and U5 components are now available as embedded models running in either Substep or Mainstep.
The embedded GMMX valve model has also been updated to include an optional battery model. A lithium ion battery circuit is placed in parallel to each submodule capacitor of the MMC valve (for both half and full bridge configurations). The battery has a main breaker and an auxiliary breaker with added charging resistor. The battery is in addition to the existing features of our GMMX model which include the option to add damping submodules, the ability to simulate internal submodule faults, and more.
These updated models can be found in the RSCAD FX software now. Stay tuned for sample cases featuring these exciting new components.
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