Optional dependency in makefile

Question

I am trying to get an optional dependency in GNU make. I tried to use $(wildcard) but am getting un-expected output:

test.mk:

a:
        @echo "a"
b: $(wildcard a)
        @echo "b"
        @touch a

expected output:

$ make -f ./test.mk b
b
$ make -f ./test.mk b
a
b

actual output:

$ make -f ./test.mk b
b
$ make -f ./test.mk b
b

What am I missing about $(wildcard) ?

Answer 1

You're not missing anything about $(wildcard ...). It's just that file a already exists when you run make b for the second time, so make doesn't need to make it and so isn't going to run its recipe.

If you add:

.PHONY: a

to the makefile then target a will be made, if required, regardless of the existence of such a file and give the behaviour you expect, but it's not clear from your post if this would really capture your objective.