Questions tagged [i2s]
Despite the name, it is unrelated to the bidirectional I²C bus. I²S is a media-specific protocol which uses at least three signals: Bit CLK, Word CLK, and at least one data line.
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Does LRCK have to oscillate in an I2S system?
I'm working on a audio function generator using the PCM 1795 DAC. I only need a single output channel for my design. Can I just pull LRCK low or high permanently for the sake of maintaining design ...
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STM32 I2S Callback and Data Width Clarification
I am using the STM32F407VG and PmodI2S2 to transfer 24-bit audio. For the most part I have followed this tutorial. So far everything works and I have audio throughput and the ability to manipulate it.
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Is this extra cycle before the MSB a common thing with serial bit timing?
The products that this is specifically around are the Pmod I2S2 which uses the Cirrus CS5343 ADC and CS4344 DAC. It is plugged into a STM32F407G-DISC1.
Now I am having some trouble figuring out ...
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How do I convert an I2S/TDM signal to a CAN signal
I'm getting output from the Analog Devices ADXL317 and I want to convert the output signal to a CAN signal. I don't think many CAN transceivers can take input from the I2S bus, so I need to find ...
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Synchronizing multiple I2S codecs on stm32f405
I am designing an audio device that requires two CODECs to be connected to the MCU - two stereo outputs, two stereo inputs. When working with a single codec, no problems with synchronization occur ...
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Problem with I2S and IIR-filter
I am working on a system that receives audio data over Bluetooth using a BM83. This is transmitted to an STM32F7 over ADC, an IIR-filter is applied and the data is transmitted out over I2S. The ADC ...
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Interlacing two physical I2S data lines into one
I'm looking for hardware that will take two physical I2S data lines, both clocked using the same WS and BCLK lines, and interlace each sample from them together to one output I2S line at double the ...
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Change ESP8266 I2S pins
On ESP8266 the default pins for I2S are:
Data bits (SD) = GPIO3/RX0,
Data bit-clock (SCK) = GPIO15,
Word select (WS) = GPIO2/TX1
However in my application Im using these pins for another purpose. Is ...
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Cross-compile and run aac-fdk on Cortext M0+ like the RP2040
I am creating a small device that should be able to input sound from a I2S microphone and to compress this sound using AAC LC compression. In another thread I was recommended a Arm Cortex M for this ...
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I2S Interface between Bluetooth Module and CODEC
I need to interface my CYBT-343026-01 bluetooth module to the AK4619 CODEC via I2S interface.
The problem is that CYBT-343026-01 only provides BICK and LRCLK, but it doen't provide MCLK which is also ...
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Receive i2S data to RP2040, PIO and DMA from MEMS microphone (SPH0645LM4H-B)
It pretty much seem to work. I have in the PIO been able to generate the clock and word select and the microphone is sending data continuously which can be verified with a logic analyser.
(maybe it ...
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Record audio with digital I2S MEMS microphone and store audio as wav file on PC
I would like to use a digital I2S microphone to record audio and store it as wav on a PC, preferably over serial connection. I have tried this with the boards ESP32 dev kit v1, MKR Wifi 1010 and ...
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Trying to drive a I2S MEMS microhpone (SPH0645LM4H) using RP2040 PIO but timing seems bad and I dont get any audio back
So I want to connecte an i2s MEMS microhpone to a RP2040.
I have made a PIO program that looks like this:
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I2S Connections - MEMS Digital Microphone, CODEC, and Raspberry Pi Zero W
I have a MEMS Digital Microphone with PDM output. I am planning to use this:
http://www.st.com/content/ccc/resource/technical/document/datasheet/57/af/88/31/7b/59/4f/77/DM00111225.pdf/files/...
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Does a codec in master mode require more than one external clock (MCLK) to drive I2S system timing?
Does an audio codec in master mode require more than one clock line (MCLK) to drive and time I2S data sync to MCU or FPGA slave?
I understand that I2S proper consists of three lines - 'bit CLK', 'word ...
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