Skip to main content

All Questions

0 votes
1 answer
101 views

Buck Converter Peak Current Mode Control Average Model

I am trying to understand average model of Buck Converter for Peak Current Mode Control Topology. Below snapshot taken from Christophe Basso Webpage(https://powersimtof.com/Spice.htm) from file "...
Power Path's user avatar
0 votes
0 answers
33 views

Current sensing in DC-DC converter

I studied DC-DC converter in peak/valley/average mode control and I have a question about the methodology to sense the current in average current mode control. I saw lot of paper about DCR sensing but ...
AnalogMan's user avatar
  • 324
1 vote
1 answer
153 views

Average Modelling of Buck Converter

I am doing Modelling of Buck Converter for LT3890 (Datasheet link attached) for Frequency response analysis . I have some reference model of Buck converter ,please refer below image Datasheet Link: ...
Power Path's user avatar
0 votes
2 answers
108 views

Power Converter Average Modelling

This image is from Christophe Basso presentation. It has been mentioned in the slide that average model can predict the transient response but I have one question when we say average model then it ...
Power Path's user avatar
0 votes
1 answer
117 views

AP63203 Buck not working

Recently I have been experimenting with the AP63203, and I just have not been able to get it to output 3.3V successfully. Currently, the way I have been testing it is using an SMT to TH adapter, which ...
Лука's user avatar
2 votes
3 answers
134 views

High voltage buck converter inductor voltage rating

We‘re designing a buck converter that should convert 600VDC down to 20V. For that purpose we use the ST VIPer26k. We’re currently looking for an inductor (L2). The inductance is 1mH, but we‘re not ...
Felix Kunz's user avatar
2 votes
0 answers
64 views

Phase shift at half the switching frequency of a dc-dc converter

I would like to know if, regardless of the control loop used (Voltage mode control, average current mode control, peak/valley current mode control), there is always a 90-degree phase drop at FSW/2 due ...
AnalogMan's user avatar
  • 324
3 votes
2 answers
229 views

Sampling gain effect in buck converter

I recently learned that there is a phenomena called sampling gain effect in dc-dc converter and I am struggling to understand what this phenomena really is. Could someone enlighten me? And I have seen ...
AnalogMan's user avatar
  • 324
0 votes
1 answer
84 views

Circuit to convert 14.8v battery with max 4a discharge current into 12v, 9v and 5v output?

I am making a robot with multiple devices mounted on top. I am planning to buy either a 14.8v or 11.1v Li-ion battery which has internal BMS limiting maximum discharge current to 4A. Now I need 9v for ...
devansh's user avatar
  • 45
0 votes
0 answers
76 views

DC-DC current mode control frequency behavior

On a buck converter in average current control mode, for example, the inner current loop sees and manages the double pole created by the LC filter, and thanks to this the outer voltage loop is blind ...
AnalogMan's user avatar
  • 324
1 vote
1 answer
109 views

Buck converter: PWM modulator input waveform

I have a question about the pwm modulator in a classical buck converter in voltage mode control (VMC). For the circuit in question, I copied over the picture provided in the answer of another SE ...
Junius's user avatar
  • 1,041
1 vote
0 answers
46 views

Are the prinicples the same for designing a high side vs low side buck?

I am an analog engineer that is getting into SMPS design. This is a high side buck: This is a low side buck: simulate this circuit – Schematic created using CircuitLab Assuming that I take ...
Voltage Spike's user avatar
  • 84.8k
2 votes
1 answer
132 views

Output Capacitor Design for a Multiphase Buck Converter

According to this application note from Texas Instruments, in the design of the output filter for a multiphase buck converter there are basically two ways of choosing the output capacitor. The first ...
Luiz Gustavo Martins's user avatar
0 votes
0 answers
35 views

Power dissipation of synchrononous buck converter cannot be reduced with gate drivers?

For this project, I had to want to reduce the power dissipation (< 2 mW) when the Rload is 54 Ω. These are the two circuits that I have employed. When I sweep the pwm frequency vs Pdiss (power ...
Kwok's user avatar
  • 113
5 votes
2 answers
627 views

What are the advantages and disadvantages of feeding DC into an SMPS?

Can I feed DC into an SMPS to get a regulated output? If yes, why? and What are the advantages and disadvantages? For example, I would like to input 200VDC to an SMPS with an input range of 100-230VAC....
Nithin's user avatar
  • 142

15 30 50 per page
1
2 3 4 5