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In a design, I have used a DDR4 SODIMM module, which has 64-bit data, thus 8 groups of data (DQ), DQS and DBI.

However, I will only use the lower 32 bit on the module, thus have to handle the remaining upper 32 bit in some proper way, since the unused DDR4 chips on the SODIMM are still powered and receive commands over the common address bus.

I asked ChatGPT "On DDR4 SODIMM module: How to connect unused half of a data bits ?", and it answered:

  1. Leave Unconnected: For DDR4 modules, it is generally recommended to leave unused data bits (DQ pins) unconnected. This is because the memory controller and the DRAM device have internal mechanisms to handle unused data lines without causing issues.
  2. No Termination Required: Unlike some earlier memory technologies, DDR4 does not typically require unused data lines to be terminated or tied to a specific voltage. The internal design of DDR4 modules allows for unused pins to float without adverse effects.

However, I would like to verify this with some proper reference to the standard, or a provider like Micron or Samsung, but I have not been able to find a description.

So, how to handle unused data, DQS and DBI on a DDR4 module ?

And is there a authoritative reference to this answer ?

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Floating isn't good probably, but it probably doesn't matter since you are only using one chip on the module, if so then you could connect them however you wish just as long as the first chip(s) is connected properly.

I would proabaly connect them to ground with a series resistor to make sure they won't transmit, you could then try not loading the resistors and see if that affects operation.

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  • \$\begingroup\$ Thanks for the comment; a pull-down resistor sounds like a good idea. \$\endgroup\$
    – EquipDev
    Commented Jun 7 at 6:17
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    \$\begingroup\$ Looked more into this, and the DDR4 IO standard is POD12, thus Pseudo Open Drain, so that IO standard appears to have pull up on the IO. That makes me think that leaving pins undriven may actually be OK, where as a pull-down resistor will have to compete with the pull-up resistors on open drain for POD. Only the differential may be an issue then, to avoid having both lines of the differential at approx the same level, which may generate internal undefined/toggle from the buffer that decodes the differential lines. \$\endgroup\$
    – EquipDev
    Commented Jun 10 at 8:04
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    \$\begingroup\$ If they have an internal pull up then leave them floating \$\endgroup\$
    – Voltage Spike
    Commented Jun 10 at 13:06

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