In a design, I have used a DDR4 SODIMM module, which has 64-bit data, thus 8 groups of data (DQ), DQS and DBI.
However, I will only use the lower 32 bit on the module, thus have to handle the remaining upper 32 bit in some proper way, since the unused DDR4 chips on the SODIMM are still powered and receive commands over the common address bus.
I asked ChatGPT "On DDR4 SODIMM module: How to connect unused half of a data bits ?", and it answered:
- Leave Unconnected: For DDR4 modules, it is generally recommended to leave unused data bits (DQ pins) unconnected. This is because the memory controller and the DRAM device have internal mechanisms to handle unused data lines without causing issues.
- No Termination Required: Unlike some earlier memory technologies, DDR4 does not typically require unused data lines to be terminated or tied to a specific voltage. The internal design of DDR4 modules allows for unused pins to float without adverse effects.
However, I would like to verify this with some proper reference to the standard, or a provider like Micron or Samsung, but I have not been able to find a description.
So, how to handle unused data, DQS and DBI on a DDR4 module ?
And is there a authoritative reference to this answer ?