I have a general question regarding the placing of decoupling capacitors.
Example at DC Vout of SMPS or LDO regulators. Does it really matter which capacitor out of 100nF, 1nF and 10uF is placed closest to the Vout?
Also, when both electrolytic and ceramic capacitor are used where should they be placed?
What order would be best in terms of noise/ripple considerations?