This is more or less at the point where you need to face the facts and ask the underlying question, rather than focusing on the immediate task. Which is tricky, as your series of questions has been reasonable to ask and answer, with this problem merely hiding in the shadows. But as you're now buttoning up the design, you're finding the buttons don't quite line up, and you're having to stretch things to make it fit. And it's worth discussing why that is the case.
The underlying problem, I suppose, is relative inexperience. You shouldn't dive in and build a 250W+ power supply without building a smaller one first. Or as much voltage, or as much current, or perhaps another at all (whatever your experience level is; I don't know). Is it infeasible [to just dive in]? No, not really. But you will find many more confusions and delays -- learning experiences -- than taking a more methodical or academic route.
Not that there are actual university classes on switching supplies, I suppose. So there is that.
-- This isn't so much a chiding, as a lamentation. This information is still largely confined to books, or practical experience. It's not well distributed on the internet, and most such resources are poor quality -- you get what you pay for -- like Stack, or appnotes. See, I say this as an engineer having grown up on internet resources myself; these resources sucked then, and I haven't seen any significant change through now.
Anyway, asking the underlying question can generate some alternative approaches:
High power levels suggest high efficiency
→ Suggests a lower-ripple (low ripple fraction) design
(Why? -- What is the definition of Q factor? What three reactive elements are mandatory to a converter? → Input and output capacitors, switching inductor.)
→ Low ripple fraction precludes peak current mode control, suggesting average current mode or constant-on/off-time controls
High current levels suggest very small loop inductance is required
→ Suggests SMT devices, with short leads and wide formats, perhaps even the use of devices in parallel
→ SMT devices suggest low power dissipation, necessitating high efficiency
Paralleling devices suggests loop inductance and snubbing issues
→ Suggests paralleling multiple (otherwise independent) inverter channels, i.e. a phase interleave scheme
Case in point, a design I did some years back, a buck module with 0-40V 10A and 0-60V 20A outputs:
Dual buck module, courtesy Tim Williams (me) / Seven Transistor Labs, LLC (2019).
Total capacity is over 1kW, in a 100mm square outline, about 30mm tall. Component placement is THT on top (except for heatsink mounted parts), SMT on both; relatively dense, but workable. I chose a dual phase-interleaved design for the 20A channel, for which without, significantly more board area would've been required to accommodate the filter capacitances (I think the single-phase figure would've been something like 4700uF 160V, which is ridiculous). At this voltage and current, TO-220 devices (not shown; placed under the board, the large holes provide access to their screws) were sufficient for MOSFET and catch diode (non-synchronous design). Efficiency is excellent, dominated by switching loss and diode conduction loss.
An average current mode control was also chosen, allowing use of commercially available powder type toroid inductors (these were the Bourns 2200LL series; they don't specify in the datasheet, but the black-coated core I believe is Magnetics' Kool Mµ® series). Each phase is operated as a transconductance amplifier (i.e., voltage input (current setpoint), current output), and the phases are simply wired in parallel. An external voltage error amplifier regulates output voltage by adjusting the current setpoint (which is common to both channels, thus they track by design, no current balancing required).
Note that inverters cannot simply be driven with PWM and wired in parallel, because PWM gives some fraction of the supply voltage, and there will inevitably be some timing mismatch and therefore voltage mismatch between channels, and one channel will hog all the load current. They must have independent current regulating loops. (That is: for average current mode control in CCM. In DCM, the timing difference equals the current difference; but DCM is ">100%" ripple fraction, so requires very low-loss and likely bulky and expensive inductors.)
Anyway, as for your capacitance -- you can go ahead with your design as-is, using enough electrolytic (low ESR) or aluminum polymer capacitors to handle the ripple. Ceramic are out, as you note, because of their bulk and cost. (They also won't be anywhere near 47uF under bias: look up the characteristic curves of any parts you might've been looking at.)
Some ceramic can still be used, particularly in combination with smaller LC filters, to address EMI if needed; they have excellent high-frequency parameters. Mind to do a stability or damping analysis to ensure any such LC networks are well damped and not prone to control loop oscillation, or resonances which incur excessive losses or emissions.
EMI also depends upon layout (component placement, trace/pour routing, overlap of current loops, proximity to fields), so keep that in mind as well.
Best of luck!
