I am working on a project that requires the usage of a AD7656 16-bit high speed converter. This chip comes in a 64-LQFP package, which means the package is rather small. Because the prototype boards will be hand soldered, I'm using 100nF 0603 X7R decoupling capacitors in combination with 10uF 1210 ceramic, as a minimum recommended amount in the datasheet. I can't use smaller capacitors, furthermore the footprints are set on Medium density to make it possible to hand solder them.
Unfortunately there isn't a recommended layout specification of this IC available. I have problems routing the decoupling caps. It's impossible to place both the 100nF and 10uF together closely to the IC, whilst maintaining space for the signals (parallel bus, etc.) to get out as well.
Now I have got 2 choices:
I place the decoupling caps to the back of the PCB, which I don't use around the A/D and MCU for noise purposes.
I place the caps further away, but that might get to a distance of 5 cm.
Placing the caps to the back of the PCB seems like the easiest solution, maybe with paralleling 2 via's to the top to reduce the loss of the PCB. My question is, will this 'work' i.e. how will this affect the performance and noise? Or would I be better of keeping all of the capacitors at the top of the PCB?