I've made a AC-DC step down buck converter that converts 220 VAC to a variable 45 to 70 VDC at 5 to 10 A to charge a Li-Ion battery. I'm currently using ESP32 to drive a MOSFET driver (IR2110) to drive my NMOS placed at the high side of the circuit. The switching frequency is 20 kHz. I also made a crude closed loop control based on current readings (with ACS712 Hall effect Sensor) to increase or decrease the duty cycle. Below you can see my buck converter and gate driver circuit.
Fig 1. Optocoupler and gate driver circuit
Fig 2. Buck converter circuit. (Do note that the current sensor mentioned above is placed at V_OUT)
My current problem is when the buck converter output is more than 1 or 2 A, the NMOS breaks (it acts as a short circuit), even though the NMOS is rated for 600 V and 40 A, as you can see here in the datasheet.
Below you can see the details on the failure
- I connected a 50 ohm resistor to V_OUT to act as a dummy load to test the voltage and current output of my buck converter circuit. In doing so, the output current will adjust based on my duty cycle.
- The input voltage is 220 VAC, which then is rectified to 311 VDC (I haven't confirmed its waveform with an oscilloscope, as I don't have access to one which can read such high voltages. Although when probing with a multimeter, its output is near 311 VDC).
- When I set the duty cycle to 12%, theoretically the output voltage should be near 36 V. But from my observation, the output voltage is 51 V (and the current output readout is 1.02 A). It doesn't stay still at 51 V, but it slowly goes up to 60 V. And not long after that, the voltage reading spiked up to 300 Vand the NMOS is dead.
- I've already used a heatsink (a 5x5 cm square heatsink) and a desk fan blowing air to it. At 12% duty cycle, the power output should be near 26 Watts (P = V^2/R = 36^2 / 50 = 26 W), so the heat dissipation should not be a problem (I think).
Because I only have a low voltage oscilloscope, I tried connecting 5 V directly to the HVDC node (see Fig 2) to give the system a 5 VDC input, to see the Source-Ground voltage characteristics when switched on or off. There's a bit of ringing (at approximately 20 MHz) and spiking (5 V spikes, in addition to 5V ON voltage) when the NMOS is switched ON or OFF. I've tried various snubber design and component values but I can't seem to remove the ringing and spiking fully. My guess is that when powered from 311 VDC, the spike is also bigger in value, and thus breaking the NMOS. However, I have yet to observe the spike voltage when connected to 220 VAC mains.
I tried to follow ROHM's guide to selecting snubber component values, and a snubber design from Ned Mohan's book Power Electronics, as shown below.
Fig 3A (left). Ned Mohan's Snubber Design for low side switch
Fig 3B (right). My snubber design for high side switch
The measured source-ground voltage is shown below
Fig 4. Source - GND transient voltage when no snubber attached. Voltage spike is at 4.64V (cursor B)
Fig 5. Source - GND transient voltage when snubber from fig 3B is attached to the circuit. Voltage spike is 2.9 V (cursor B). I tried varying the capacitor and resistor values (a combination of 10 nF, 100 nF, 200 nF and 10Ω, 100 Ω, 50 Ω) but the waveform seems to not change much.
My questions would be:
- Besides the ringing and spiking, are there any more possible reason that can cause said NMOS to fail?
- Does the ringing actually harm the NMOS? If not, can I just use an IGBT with 1500 VDC rating to bypass the excess voltage spike?
- Are there any mistakes in my circuit design that can cause the NMOS to fail?
- If I found a snubber combination that can suppress said spikes and ringing at 5 VDC, will the same combination values work with 311 VDC?
If it helps, the PCB design can be seen below. There are some components that are not shown in Fig 1 or 2, it's just a relay and a discharging resistor. Do note that the relay is not present when the failure happened.
Fig 6. Top layer of PCB
Fig 8. Prototype layout (only for snubber testing at 5 VDC). I know that soldering the NMOS like that is a huge safety concern, but this setup is only for testing the spikes and ringing I described above with 5 VDC input connected straight to the drain (HVDC node at Fig 2). When the failure happened, the NMOS is soldered straight into the board.