I roughly (abstractly) understand why pipeline is k
times faster than non-pipelined one (like this way):
- K stage pipeline dividing the circuit into k parts.
- Each stage has the same transistor delay (Ideally)
- So it is K times faster.(like using conveyor belt system on car factory)
But I cannot understand this mathematical expression:
clock cycle time = t
number of command = n
speedup = (n*k*t)/((k-1)*t+n*t) = (n*k*t)/(k*t+(n-1)*t)
if n -> infinite: speedup is k
What I don't know is: What ((k-1)t+nt) means?
I can just understand (nkt)
means non-pipelined time, so I believe ((k-1)*t+n*t)
should be the pipedlined time.
But, why ((k-1)*t+n*t)
is pipelined time?