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The iAPX 432 was arguably the most complex processor architecture ever and a commercial failure for Intel. It was a stack machine with no visible general-purpose registers. It had hardware support for object-oriented programming, garbage collection, and multitasking. The operating system was to be written in Ada.

According to Wikipedia,

The iAPX 432 instructions have variable length, between 6 and 321 bits. Unusually, they are not byte-aligned, that is, they may contain odd numbers of bits and directly follow each other without regard to byte boundaries.

What were the instruction(s) that needed only 6 bits? If I am reading the article correctly, such instructions would consist only of a "class" field, with no format field, no operands, and no opcode.

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A 6-bit instruction is necessarily order 0 (no operands) and with only a single operation in the class.

The architecture manual lists only these, chapter 11:

Branch 100110
Breakpoint 111111

All branch operations require a 'branch reference' that gives the target of the branch; this is technically not an 'operand'. It is therefore unclear whether the entire branch operation should be regarded as a 6-bit instruction, or longer. 'Breakpoint' is however complete in 6 bits.

The other order-0 instructions, return and return-and-fault (class 000110) require an opcode part to distinguish them, thus more than 6 bits.

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    My reading is that branch instructions, including "BRANCH" (BR) take a "branch reference" (a technical term here in this architecture document) which is a field that must be encoded but it is explicitly stated to be not an operand! (Whatever that distinction is supposed to mean!?) See page 7-22 of the document you link (which is page 131 of the PDF). So maybe it is considered to be a "6-bit instruction" - or maybe not, leaving BREAKPOINT as the only instruction that is really only 6-bits. (The various branch instructions are described at page 299 (10-65) in the doc.)
    – davidbak
    Commented Jun 8 at 22:25
  • I agree - I read that part later. I imagine it's "not an operand" in the same way a branch offset is not an operand on a VAX (doesn't follow the convention for an operand specifier).
    – dave
    Commented Jun 8 at 23:24
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    Updated answer to include branch reference details.
    – dave
    Commented Jun 9 at 15:01
  • Wouldn't a stack machine have most operations on the accumulator as 0-operand instructions? Like ADD would pop twice, add two values, then push the sum. That's what I was thinking for a hypothetical stack machine I wanted to simulate.
    – qwr
    Commented Jun 10 at 1:25
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    The 432 is apparently not a pure stack machine, though it has stack instructions. The code structure is such that a stack-based 'add' instruction would require a class value (4 bits), format bits to say all stack operands (4 bits), and some opcode bits (4 bits)
    – dave
    Commented Jun 10 at 10:42

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