All Questions
Tagged with ttl digital-logic
103
questions
2
votes
2
answers
139
views
What is a simple circuit to generate TTL signal with fixed frequencies?
What is the simplest circuit that can be used to generate a 5V TTL signal with fixed frequencies such as 0.5Hz, 1Hz, 50Hz, 100Hz, 500Hz, 1kHz, 5kHz, 10kHz..?
- 354
1
vote
3
answers
112
views
Simple TTL: Is there a way to "detect" a high-z state and easily use that to drive other logic?
I have two TTL style logic chips, call them A and B (*), where the outputs of A are the inputs to B (think: 8 data lines). A has tri-state outputs, so when they are turned off they float. B is an ...
- 2,131
12
votes
4
answers
2k
views
When is it appropriate to mix 74LSxx components with original TTL 74xx?
I spend almost all my tinkering time with 1970s era logic circuits, which use almost all original 7400-series TTL. I do a fair bit of repair and am now starting to design additional logic to work with ...
- 2,131
0
votes
2
answers
136
views
What is the application of the 74LS373?
Looking at the truth table, the data from the D(n) input are directly transferred to the Q(n) output when the high state appears at the C (CLK) input. If there is a low state, there are no data at the ...
- 1,413
0
votes
6
answers
1k
views
Output voltage level of TTL gate
The output voltage level of the TTL logic family is from 0 to 0.4 volts (LOW) or 2.4 to 5 volts (HIGH). Suppose we have a TTL inverter with a square wave of 5 volt amplitude as input (0 volt and 5 ...
- 387
0
votes
0
answers
59
views
What is the quiescent power dissipated by a TTL totem-pole output stage?
In High-Speed Digital Design by Johnson and Graham, the quiescent power of a TTL totem-pole is given as:
$$P_{quies} = \frac{0.4I_{sink} + 1.0I_{source}}{2}$$
I am fairly certain the 1.0 is a mistake ...
- 209
17
votes
11
answers
2k
views
Why was so much TTL logic design "negative true"?
I've been spending time with schematics debugging busted 1970s TTL-based computing circuits. I'm sure this is a more general question but I'll ask it in this context since that's what I'm exposed to.
...
- 2,131
2
votes
2
answers
150
views
Debugging a problematic old TTL pull-up that's not pulling up
I am trying to bring back into operation a late-70s disk controller board (all 74xx TTL). I'm stuck trying to figure out why a small pull-up network is resulting in a far out of spec voltage not doing ...
- 2,131
3
votes
1
answer
887
views
Why does the 74LS08 see an input logic level even if the inputs are not connected?
I have an 74LS08 (AND gate.) I did not connect any inputs to the IC, but it gives me voltage at the outputs. Should I separate VSS?
1
vote
1
answer
127
views
What is this chip called? [closed]
I need a TTL chip 74 series, that takes in some amount of inputs and one enable bit. When the enable bit is high, the output is the same as the input. When the enable bit is low, the output is all low....
- 139
0
votes
2
answers
466
views
To drive current with open-collector gate when input is high, do I need a buffer or an inverter?
Once upon a time I knew the answer, or could just try it. But with distance I forgot. When I use an open collector, I do it to drive some load. So High means current is flowing. But when it is used as ...
- 1,541
0
votes
1
answer
312
views
Frequency counter schematic
I was wondering what's wrong with my Proteus schematic.
This schematic is supposed to show the frequency in Hertz on the display but instead only three zeroes are displayed.
Is there any component ...
- 3
2
votes
4
answers
235
views
74xxx logic. Cheapest, most space saving way to invert 10 logic outputs
Please see this circuit.
I'm trying to design a circuit that allows you to use a single button to increment a counter from 0 to 9 (then it will loop). Diode logic will convert the 10 logic outputs to ...
- 309
2
votes
1
answer
226
views
Correcting the lower output level of a square wave generator
I have assembled a square wave generator following this schematic from an old book.
R1 and R2 are both 1 kohm, C1 is 68 pF, and C2 is 2.2 nF. The author of the book claims that this combination is ...
1
vote
0
answers
138
views
Confusion In Fanout of Logic Circuit and Transistor
Fanout:-Maximum Gate we connect to output of any Logic gate.
so there is limited number of gate we connect the output of Logic Gate.hence there is some minimum condition required for operation of ...
- 306