All Questions
Tagged with nmos transistors
92
questions
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Driving NMOS source with a separate power supply
I am trying to see whether I can turn on 28 V voltage rail from a 5 V input signal using an N-channel MOSFET (NMOS). I am using IRF530N for now which has a threshold voltage of 4 V. I just modeled it ...
3
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4
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Alternative to MOSFET transistors as a switch
I am looking for a 3-legged component that can be used as a switch as an alternative to an NMOS transistor. My circuit currently looks the following: -
simulate this circuit – Schematic created ...
2
votes
1
answer
321
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How can I separate the body from the source of a MOSFET?
The above are physical look of a decapsulated MOSFET and the diagram connection between the source (S), gate (G), drain (D), and the body. Both of them are kind of N-MOSFET. If you want to see how the ...
1
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1
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998
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What is the equation for the curve in an Ids-Vds graph that separates linear and saturated regions in a MOSFET transistor?
This curve separates Linear/Saturated regions in an Ids=f(Vds), with varying Vgs, graph for a 0.35um NMOS.
I understand that I can connect the points where:
...
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54
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How can I find \$\small V_{GS}\$ in this question?
My attempt:
DC ANALYSIS
Using voltage divider: $$V_{G0}=\frac{200\ \mathrm{k\Omega}}{300\ \mathrm{k\Omega}} \cdot 3\ \mathrm{V} = 2\ \mathrm{V}$$
By KCL $$I_{D0}=I_{D1}=I_{B}=I_{D}=1\ \mathrm{mA}$$
...
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0
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498
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How do I find the point where MOSFET changes from triode region to saturation?
I have made a rough plot starting from the cutoff region, where \$\small V_{DS}=V_{DD}\$ until the input voltage crosses the threshold, and then the output voltage begins to drop (approximately ...
1
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1
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59
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Will the saturation current through one of these NMOS circuits always be greater than the other?
Is there a definitive way to know for all cases if an NMOS would have a greater saturation current if a resistor R is connected to 1) the drain side or 2) the source side?
The assumption is that the ...
1
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1
answer
261
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How does an NMOS transistor enter the triode region?
In my book it states that a transistor is in the triode mode when the gate to drain voltage is greater than the threshold voltage or equivalently when the drain to source voltage is less than the ...
7
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2
answers
3k
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Why do we need transmission gate for XOR (transistor level design)?
The following image shows a 6-transistor XOR circuit.
But I don't know why the last 2 gates are needed at all, the circuit can be simplified to:
Is there anything that prevents us from using the ...
-1
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2
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599
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How do you go from gate level to transistor level?
Is there a good method to go from circuit at gate level or truth table to transistor level, other than trial and error?
I have an example here to illustate what I am asking.
We have the function \$X=(...
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2
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619
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NMOS as a switch [closed]
I'm doing some simulation with nmos transistor, which supposed to act like a switch according to this picture:
but after doing the simulation, I get these results:
I don't understand why the output ...
0
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1
answer
300
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Is an NMOS device symmetrical with regard to its D and S pins? [duplicate]
Can D and S be swapped? (Assuming the body is not internally connected to S.)
The structure of a MOSFET is totally symmetric. Even the LTspice simulation shows that it can be swapped.
Does this ...
1
vote
2
answers
676
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How is common source NMOS stage with active current load realized in practice?
In a well known book about CMOS circuit design (Design of Analog CMOS Integrated Circuits) I found this example about a cascode stage with current source load.
The basic idea is, to replace the drain ...
0
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63
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To turn a ratioed circuit into non-ratioed circuit, what should be the transistor sizes for proper operation of this circuit?
The circuit is at the bottom. I know it is a ratioed circuit however, how can I convert it to a non-ratioed circuit without adding two more PMOS transistors between Vdd and the other PMOSs. Also, what ...
0
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2
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751
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How does logic 1 get passed through an NMOS pass transistor?
I'm studying pass transistors. One thing I came across in several of the books is that when an NMOS has a logic state HIGH and the input terminal (the schematic below) is also HIGH, the output ...