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If you have some SRAM in an ASIC and you want to reset it to 0 quickly, rather than looping over the entire memory can you just write to all words in parallel by asserting all word lines at once (this would require a very slight modification to the address decoder)?

As far as I can tell, from a logical point of view this would be fine, but would it cause any physical design issues, e.g. current spikes; or any IP issues (I don't know how much of the SRAM is typically supplied as a black box)?

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  • \$\begingroup\$ How much storage are you thinking of? \$\endgroup\$
    – jonathanjo
    Commented Jul 4, 2023 at 8:53
  • \$\begingroup\$ Say 1kB of 8 bit words. \$\endgroup\$
    – Timmmm
    Commented Jul 4, 2023 at 8:55
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    \$\begingroup\$ I would think that connecting 1k memory cells all at once to each of the bit lines would probably overload the bit drivers, giving unreliable results. \$\endgroup\$
    – Dave Tweed
    Commented Jul 4, 2023 at 16:59
  • \$\begingroup\$ That sounds plausible, thanks! \$\endgroup\$
    – Timmmm
    Commented Jul 5, 2023 at 6:39

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