Synchronizing signal generators with shared LO

Question

I'm currently trying to test my ADC chip using two signal generators. Below figure visually illustrates how the test setup would look like:

The traditional approach uses a 10 MHz reference port to synchronize two signal generators, but I am concerned about its long-term phase and frequency instability.

The best alternative approach would be using 1 GHz reference by skipping 10 Mhz -> 1 GHz freq synthesis, but unfortunately, PSGs in the lab do not have this option (H1S).

E8267D in the lab has an HCC option, which enables phase coherency by sharing LOs. However, it is unclear to me if this option allows for two signal generators to have different output frequencies. For example, the figure below shows how the HCC option is configured within the signal generator. As the internal PLL is positioned prior to the LO input ports, It seems improbable to have two different frequencies at the output of two signal generators synchronized via HCC.

For reference, I am attaching another figure showing the rear panel of E8267D that we have in the lab:

Any advice would be really appreciated.

Answer 1

I'm answering my own question for people who may encounter the same problem in the future.

After some research and asking questions to Keysight engineers, having different output frequencies using HCC options (sharing a common LO) is impossible. In this case, the cheapest way to solve this problem is using 10 MHz since 1 GHz REF IN/OUT cannot be retrofitted after the fact. The best way to solve this problem is purchasing a signal generator supporting multiple output channels with full coherency.