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I am generating PWM on the TIM1C3 channel of an STM32 Bluepill board. A switch is connected to the system and when the switch is in the set position, I want the PWM production of TIM1C3 to stop and become logic 1. I want it to generate PWM when reset. Is this possible and how can I do it (with cubemx configs)? I used the following method but it didn't work.

HAL_TIM_PWM_Stop(&htim1, TIM_CHANNEL_3); 

HAL_GPIO_WritePin(GPIOA, GPIO_PIN_10, GPIO_PIN_SET);
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2 Answers 2

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Yes. It is possible. Your code does not work because you keep the IO pin being an alternative output for timer instead of setting it as normal GPIO.

There are several ways to do it. Either stop the PWM generation while it is high, or switch the IO pin function to normal GPIO.

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  • \$\begingroup\$ There are alternate function push-pull and alternate function open drain options. is this what you have mentioned? \$\endgroup\$ Commented Mar 18, 2023 at 15:25
  • \$\begingroup\$ No. You need them for PWM and must not use alternate functions if you want GPIO. \$\endgroup\$
    – Justme
    Commented Mar 18, 2023 at 16:05
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I would just set the PWM's duty-cycle to 100% in that case, which is equal to a logic 1. This way, you never actually have to stop the timer and only need to modify the timer cannel's Capture Compare Register (CCR).

For a 100% duty cycle, you need the value of the CCR register to match (or exceed) the value of the timer's Auto Reload Register (ARR).

Both, the CCR and ARR are preconfigurable in CubeMX but you can read and write them by HAL-Library Macros.

As an example:

 uint32_t arr = __HAL_TIM_GET_AUTORELOAD(&htim1); //Read Auto Reload Register Value of TIM1
uint32_t crr = __HAL_TIM_GET_COMPARE(&htim1, TIM_CHANNEL_3); // Read Capture Compare Register of TIM1C3. Save it to turn back to original duty-cycle.

__HAL_TIM_SET_COMPARE(&htim1, TIM_CHANNEL_3, arr); // Set TIM1C3 CRR to TIM1 ARR for 100% pwm output. Equals logic 1.

Things might be a bit different depending on the configured PWM-Mode and Output Polarity. In some cases you must set your CRR to 0 to get a logic 1.

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