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I am trying to find resources about this process, but the only thing I have been able to find is the full form of the acronym CLAP any help is appreciated.

This process is used vehemently in the design of BGA chips and attaching the BGA to the chip, but no comprehensive information is provided for this right now, all help is greatly appreciated.

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Actually, the acronym I've seen is CLASP, to keep the weekly status reports safe for work. :-)

Not sure what you're looking for...couldn't find anything like a tutorial, although there's an overview here: https://www.micross.com/wp-content/uploads/2020/03/Micross_CGA_2018_11_Rev1.3-compressed.pdf

More detail here, but these are pretty meaty.

https://epdf.pub/solder-joint-reliability-prediction-for-multiple-environments.html https://www.circuitinsight.com/pdf/ccga_solder_column_attachment_smta.pdf https://www.researchgate.net/publication/325541643_CCGA_-_SOLDER_COLUMN_ATTACHMENT_FOR_ABSORBING_LARGE_CTE_MISMATCH/download

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  • \$\begingroup\$ This is what I found also. I am looking for the manufacturing process which has been named CLASP. For example, the manufacturing of PCB has a lot of information about the process, from the laminate used, the adhesive used, the machines used, but CLASP neither has information given by companies nor a lot of research. I have a two-fold query here, why don't we have information about this process given by companies and why arent there any reserach. \$\endgroup\$ Commented Dec 15, 2021 at 5:25
  • \$\begingroup\$ It could be that manufacturers consider this process to give them enough of a competitive advantage that they don't want to share details with potential competitors. In some cases, you might find "defensive" publications in obscure journals, but these are intentionally difficult to find, and almost never available on the internet. \$\endgroup\$ Commented Dec 16, 2021 at 14:32

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