The basic 6T structure used for storing data is same as one used in "Positive Feedback Differential Voltage Sense Amplifier", then how come while the data is stored in SRAM memory cell it doesn't get amplified?
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asked Jun 25, 2014 at 11:25
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2\$\begingroup\$ Can you provide links to what you are referring to? \$\endgroup\$– Andy akaCommented Jun 25, 2014 at 11:39
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\$\begingroup\$ Added the image of the Sense Amplifier and SRAM structure can be found at: en.wikipedia.org/wiki/Static_random-access_memory \$\endgroup\$– shingaridaveshCommented Jun 25, 2014 at 12:27
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Yes, the transistors in the SRAM cell are functioning as amplifiers; it is the internal positive feedback that creates the bistable operation that is used to store information. However, the sizes of these transistors are kept as small as possible so that more of them can be fit into a given amount of area, and to keep leakage currents as small as possible.
When a read operation occurs, the outputs of the four internal transistors are connected to the bit lines by the word-select transistors. The weak internal transistors need to drive the bit lines low/high through the select transistors, which means that the available signal is somewhat attenuated, both by the voltage offsets introduced by the select transisors and by the relatively high capacitance of the bit lines. The resulting differential signal doesn't look at all like a "normal" logic signal.
It is the purpose of the sense amplifiers on each pair of bit lines to turn that weak differential signal into a normal logic signal that can then be fed to additional data multiplexers and/or I/O pin drivers.
In SRAM design, it takes a serious amount of analysis to determine how small the cell transistors can be while still providing enough signal during a read operation to achieve the performance goals for the device.
answered Jun 25, 2014 at 11:53
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\$\begingroup\$ Thanks a lot. Can you provide some link or if possible then explain that "How any small disturbance created in the bi-stable circuit gets stabilized and ultimately leads to one of the Stable state i.e. 0 or 1" ? \$\endgroup\$ Commented Jun 25, 2014 at 12:30
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\$\begingroup\$ I don't know. Where did you read that? It isn't on the page you linked to in your comment. It sounds like a basic description of positive feedback. \$\endgroup\$ Commented Jun 25, 2014 at 12:56
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\$\begingroup\$ Yes it isn't on the page. And yes it is positive feedback. I wanted to understand that on CMOS circuit level (H/W) and wasn't able to find any good source for the same. \$\endgroup\$ Commented Jun 25, 2014 at 13:13
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\$\begingroup\$ Please correct me if I am right: Say that in Positive Feedback circuits shown above, Value[1]="0" and Value[2]="1. Now if say Value[1]=0+deltaV, If this is below the transition voltage (i.e. Voltage considered for Logic 1) then it will retain the value and feedback with correct it back to 0. \$\endgroup\$ Commented Jun 25, 2014 at 13:23
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1\$\begingroup\$ Yes, that's essentially correct. The amount of energy it takes to flip the circuit from one state to the other is determined by the resistance of the devices that are on. You have to push enough current through them so that the voltage on at least one node crosses the switching threshold. BTW, that's another reason that the cell transistors are kept small -- so that they can be overpowered by the bit line drivers during write cycles in a reasonable amount of time. \$\endgroup\$ Commented Jun 25, 2014 at 14:36