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Electrical Engineering
Shashank V M's user avatar
Shashank V M's user avatar
Shashank V M's user avatar
Shashank V M
  • Member for 4 years, 7 months
  • Last seen more than a week ago
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24
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Top posts
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34
Why would an AND gate need six transistors?
Nov 22, 2020
14
Why does decreasing the CMOS supply voltage also decrease the maximum circuit frequency?
Feb 18, 2021
10
Why do silicon wafers look rainbow colored?
Jul 3, 2021
10
How does an operating system or program detect the CPU model name? [closed]
Jul 21, 2021
6
How does an operating system or program detect the CPU model name?
Jul 21, 2021
5
Why do we declare the inputs of our design as reg in testbench and outputs as wire?
Jan 26, 2021
5
Viewing verilog enums in iverilog + gtkwave
Nov 7, 2020
5
Where is the RAM stored on a RISC-V CPU?
Jul 20, 2021
5
What is the difference between a glitch and a hazard?
Jul 16, 2021
5
Does combinational and sequential logic correspond to some mathematical logic systems?
Sep 21, 2020
Top Meta posts
17
4
16
Time to burninate [small-electronics]?
9
Can Processor and Microprocessor tag be merged?
6
Should [flipflop] tag be changed to [flip-flop]?
3
Do we need a hardware tag?
3
Burninate [small] tag
Top network posts
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18
Why do more powerful programming languages tend to have slower implementations?