All Questions
4
questions
0
votes
1
answer
796
views
Remove/exclude exposed pad of QFN package from PCB layout
I am doing a PCB layout with a Atmel/Microchip MCU ATSAML21E18B-MUT which has QFN-32 package 5x5 mm. This board can have a maximum of 20x40 mm and I am having problems with space because the circuit ...
- 657
0
votes
1
answer
225
views
Minimum distances between box case connectors and PCB surface conductors
I am working on a few kV PCB design with external voltage connectors (HIGH and GND levels). So user interface connectors are thought to be bananas jacks (they support until 7kV but has soldering ...
- 851
7
votes
2
answers
556
views
Do packages have to be centered in eagle to export valid pick and place data?
I am working on a PCB featuring this SD card connector
http://media.digikey.com/pdf/Data%20Sheets/Amphenol%20PDFs/101-00313.pdf
In the technical drawing, it seems that the origin of the part is the ...
- 231
1
vote
1
answer
295
views
Best way to prototype a TDFN package chip (MAX9814 and MAX9820)?
For my engineering project, we wanted to use the gain control and amplifier available on these two chips, but are finding difficulty with prototyping them as they are so tiny. One of the chips is a 14 ...
