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0 votes
2 answers
112 views

Simulation of high side N-channel MOSFET with Bootstrap in LTspice

The inverter circuit I made from N-channel MOSFETs is given below. I used bootstrap for the high sides. Bootstrap capacitors are C3 and C1. The gate voltage of the MOSFET is working properly, the ...
Mhan's user avatar
  • 405
0 votes
2 answers
214 views

Issue with LED and capacitor circuit

I have recently downloaded and am familiarising myself with LTspice, and to do so I started with a basic circuit. I had never used a scope prior to this and thought a capacitor discharging to an LED ...
Smi Jay's user avatar
3 votes
1 answer
84 views

How do I configure a negative clamper in LTspice?

I am trying to make a negative clamper in LTspice. The pulse source goes from 10V to -10V harmonically. My aim is to lower it's voltage by 7.3V, so it will have a pulse graph going from 2.7 to -17.3V, ...
Pascal's user avatar
  • 43
2 votes
3 answers
1k views

The output of my rectifier which should be charging a capacitor on LTSpice is extremely jumpy and inconsistent

For some reason, every time that I include a capacitor in this circuit LTSpice transient analysis is very jumpy. Is there a better way to use the output of a bridge rectifier for this purpose? I tried ...
Alex Heinle's user avatar
1 vote
0 answers
123 views

How to model a hand crank generator in LTSPICE?

I built the following circuit that uses a small BLDC motor (3-24V AC) to generate enough energy to light an LED for roughly 40 seconds once C1 is charged to 5V and the generator stops. It takes about ...
Movieboy's user avatar
  • 217
1 vote
3 answers
1k views

Why can't I charge a capacitor using a N-FET as switch

I'm new to MOSFETs and LTspice, but I have an N-MOSFET working as I would expect with resistive loads, I’ve had step like input on the gate too and all seems good, but whenever I put a capacitor in ...
George kirby's user avatar
0 votes
4 answers
133 views

Can’t Get 555 Timer Capacitor to Ever Discharge or Charge to Expected 2/3 Vcc Value

I am trying to set up a circuit in which an NE555 timer's duty rate and frequency output is illustrated by it's output being connected an NPN transistor. When the out- put is high, LED1 will ...
Elliott Goldstein's user avatar
0 votes
0 answers
251 views

How can I simulate a super capacitor in LTspice?

I am trying to simulate a super capacitor in LTspice but it is not giving me the correct discharge time as it should be theoretically. Has anyone also faced this issue? Please let me know how to ...
Alihussain Vohra's user avatar
0 votes
1 answer
122 views

If a capacitor value is given as an equation, how can it be written in LTspice?

For example: If a capacitance equals q·v·Ne·evj, can I insert a simple capacitor and put its value as Q= (q·v·Ne·exp(vj))·x, where x is the predefined variable which means voltage across the capacitor?...
L1234's user avatar
  • 47
0 votes
0 answers
102 views

Loading problem with circuit simulation

EDIT #1 So I understand now the phenomenon that is happening. Taking operational stage 2 Switch is OFF. So there are the 2 cases discussed. RL = ∞ (exaggerated scenario) the current I1 >> I2 ...
DRF's user avatar
  • 536
0 votes
1 answer
108 views

Fourth-order passive filter not behaving as intended

I have been designing a passive 4th-order RC low-pass filter in LTspice and was surprised to see that the slope is off substantially from what I would expect for a 4th-order passive filter. Instead of ...
Jake Slavin's user avatar
0 votes
0 answers
50 views

What is the difference between adding capacitor in 2 different ways to create the delay?

I’m finding similar delay results for both the circuits shown below. Draft 1: Capacitor C3 and C1 are connected to separate branches, though both of them together determine effective delay. Draft 2: ...
Dynamic_equilibrium's user avatar
0 votes
1 answer
105 views

Ltspice easy DC LC circuit

I'm making this simulation of an LC circuit with DC. After simulating it with different simulators, it seems that LTspice is doing something wrong. Also, if you mess with the simulation time, it ...
Jelle's user avatar
  • 77
4 votes
2 answers
231 views

Strange behavior when simulating a five-level flying capacitor inverter in LTspice

I'm studying the multilevel flying capacitor inverter topologies. I simulated a five-level model on Simulink and the results are OK, but when doing the simulation in LTspice with MOSFET models (IRF830)...
loromalo's user avatar
0 votes
2 answers
155 views

Measuring variable capacitance [duplicate]

I am required to design a circuit to measure C using the parallel plate capacitance formula. The circuit should be able to detect a change in the separation d of 5 × 10−4 mm. I have done the following ...
Roberto El Electrico's user avatar

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