Generic logic pins today are CMOS type.
The MCU output will drive very close to GND/VCC, with a Thevenin equivalent resistance in the 30-70Ω range -- what range exactly depends on state (typically, PMOS is a little weaker), what the specified drive strength is (VOH/VOL at IOH/IOL) and manufacturing variation (the transistor size varies modestly from chip to chip).
The FTDI input pin will be essentially a capacitance; there are clamp diodes to limit excessive voltages (such as during ESD), then MOSFET gates. From the datasheet:
FT232R
The pin types are defined for these pins on p.10.
Voltage ratings, p.15. Specs continue on pp.15-17 showing characteristics at various supply voltages.
Unfortunately they do not give an equivalent pin circuit, and input leakage current is not specified, but note 3 is most relevant here.
Therefore a mostly-high (0xff) padding will draw the least current through the internal pull-up resistors.
After static current, there is dynamic current. When the pin changes state, capacitances are discharged through transistor resistance, and power dissipated. Typically the energy is constant per switching edge, and power / current consumption is proportional to rate. Eliminating transitions entirely is preferable -- using a variable-length packet for example -- but the next best is a value with few transitions, like 0x00 or 0xff. Again we prefer 0xff.
Most likely, the current draw due to pin changes is negligible in comparison to internal operating current draw by the MCU and FTDI themselves.