Might this tri-state level shifter work?

Question

I just thought of this idea for a one-directional tri-state level shifter that does not need an output-enable pin:

The idea is that if the input A driven hard (high or low) then it just behaves as a buffer, but that if the input is tristate then the comparators have opposite outputs and the output Y is tristate.

If the input is weakly driven or has other pull resistors then you might not be sure if the output will end up driven or tristate. You can fight against this by making the input resistors stronger, at the expense of wasting power.

Might something like this actually work? Does it already exist and what is it called?

Edit: I had hoped this was already clear from the above (and two of the three answer authors already correctly understood it) but to clarify:

When I said "one-directional" I mean I want something where the input is an input only, and the output is an output only. I know about bi-directional level shifters, that isn't what I want.

When I said "tri-state", I mean that I want something where the output is driven hard high (1), hard low (0), or is turned off completely without any pull (Z). I am aware of weak-drive open-drain I2C level shifters, this isn't what I want.

Finally when I said "without an enable pin" I meant without a second input pin that switches from driven output to high-impedance. I am aware that some bi-directional level shifters have a pin to select direction, this isn't the pin that I am trying to eliminate.

Answer 1

Might something like this actually work? Does it already exist and what is it called?

Yes, this does work. Looking at the circuit, it is two open-drain (open-collector) non-inverting buffers, one p-chan, the other n-chan, sharing a common output pin. The inputs are implemented as differential comparators with (I presume) push-pull outputs; however, they could be implemented simply as individual transistors, depending on other considerations, such as speed requirements which will impact how to drive the gates of the output transistors, among others.

I am not sure if this circuit has its own name.

The input-to-output DC transfer function has three zones: low-impedance output HI, low-impedance output LO, and a middle zone where the output impedance is high (where both output transistors are off).

Answer 2

Yes, voltage translators without direction pins exist.

They depend on the driving output being able to overpower the drivers, under all possible conditions. It may be difficult to guarantee that with the data provided from the parts they connect to on each side, so personally I tend to instinctively avoid them (having had to diagnose nasty intermittent problems with another person's design that used them). If you can just tie a pin high or low, or control it actively, it seems a lot simpler.

In practice they work more like the ancient 8051's pseudo-bidirectional pins with a one-shot that produces a brief strong pulse at transitions to charge or discharge external capacitance, which again introduces complexity to the operation. For example:

Answer 3

Yes, this should work. A floating input is pulled to midsupply, which turns off both transistors, giving a floating output. The comparators would have to have push-pull outputs; open-drain outputs wouldn't work for this.

A few notes on the design:

• The resistors to Vcca and GND in the input stage should be chosen large enough that even a weak microcontroller output (which I've seen rated as low as 50 μA maximum) can overpower them to a valid logic level.
• The resistors in both dividers should be as large as is practical anyway, to minimize quiescent current draw. Make sure they're low enough to provide sufficient input bias current to the comparators without significantly affecting the set voltage, though. Use comparators with as low an input bias as practical.
• The speed of the circuit is limited by the speed of the comparators, the output drive strength of the comparators, and the size of the MOSFETs. If you need this to level shift multi-MHz signals, make sure to choose FETs with very low gate charge; you certainly can't use big power MOSFETs for the output stage.
• You should probably choose the resistances in the three-resistor divider such that the Vih,min and Vil,max match those of either standard CMOS or standard TTL, and then design the two-resistor divider to hit a point in between. If going for TTL inputs, you may want to use a shunt voltage reference to set one of the thresholds, rather than purely resistors.
• Unless you use a comparator input architecture that can work with inputs exceeding the supply voltage, this would only work with Vccy ≥ Vcca. If Vccy < Vcca, you could power the comparators from Vcca and just connect Vccy to the output FET, though. You could use a simple diode-OR to automatically use the higher supply for the comparators. If that's too much voltage drop, there are more complex ORing circuits that use logic and MOSFETs.
• There's no reason you can't similarly separate the grounds; for similar reasons as above, you would be limited to either GNDy ≤ GNDa or GNDy ≥ GNDa depending on where the grounds are split. Again, a diode OR would allow automatic use of the lower ground potential.