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I need to generate a biphasic pulse as shown below.

[![enter image description here][1]][1]

The specifications of the pulse is given below.

Amplitude 0~10mA

Pulse width 10~500µs

Constant inter-pulse delay = 100 µs

Pulses Per Train = 1~10

Pulse Repetition Frequency(PRF) 30~150 Hz

May I know is it possible to generate a pulse as shown below using a constant current source.

The current source circuit is given below.

enter image description here

If not possible can you suggest a circuit for generating the pusle

EDIT 2:I THINK WE CAN USE HBRIDGE FOR GENERATING THE CURRENT PULSE

Please see the circuit below.

enter image description here

May I know your comments

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  • \$\begingroup\$ What rise/fall time? Compliance (voltage) range? Precision? And, I assume your question is more interesting / more in depth than merely "is it possible"? \$\endgroup\$
    – Tim Williams
    Commented Jun 2 at 8:59
  • \$\begingroup\$ Use a pair of BJTs (NPB & PNP). It should be bidirectional. \$\endgroup\$
    – Antonio51
    Commented Jun 2 at 9:01
  • \$\begingroup\$ Which resistor in your schematic is the load? What is the load in the final applicaiton? For the final design you want, is one terminal of the load connected to a common node, eg; GND? \$\endgroup\$
    – Fabio Barone
    Commented Jun 2 at 9:27
  • \$\begingroup\$ @Antonio51,Can please explain with a circuit \$\endgroup\$
    – Confused
    Commented Jun 2 at 10:03
  • \$\begingroup\$ @TimWilliamsc,this is a POC .I don't have RT,FT spec \$\endgroup\$
    – Confused
    Commented Jun 2 at 10:04

1 Answer 1

Reset to default
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The circuit below is worth exploring. R1 is the load. V3 is the signal generator of the current waveform you want. Scale of current per volt of input is set by R2, in this case 1V == 0.1Amps.

schematic

simulate this circuit – Schematic created using CircuitLab

Input signal: enter image description here

Output, current in R1:
enter image description here

For an input of 0.1V, the output will be a current of 10mA. You simply provide the reference signal to node [Vin], and the circuit will generate the corresponding current in R1.

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  • \$\begingroup\$ The Output, current in R1 diagram appears to show "spikes" in the current up to approximately +/- 18 mA on some transitions of the input signal. What is the cause of the "spikes" and if you zoom in on the X scale what is the time duration of the "spikes"? \$\endgroup\$
    – Chester Gillon
    Commented Jun 2 at 11:10
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    \$\begingroup\$ @ChesterGillon This is just the result of the simulator I happened to use that is associated with this website, "CircuitLab". I used the default models for op-amp and BJTs, and made no attempt to optimise or adjust in any way. First time I used this simulator, I am far more familiar with LTspice. I suspect the slew-rate limit of the op-amp may be a factor here, these spikes occur when the current changes polarity, in which case the opamp output becomes disconnected as it turns off one BJT and turns on the other. The signal is 1kHz. \$\endgroup\$
    – Fabio Barone
    Commented Jun 2 at 11:15
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    \$\begingroup\$ @ChesterGillon Possible solutions are: 1. Put a dv/dt limiter at the input to the the op-amp; 2. change the output stage from class B to class AB. 3. Remove the output buffer altogether if the output current required is within the capability of the op-amp. But given the OP has not provided much in the way of specifications or requirements then I was reluctant to spend much effort sorting out problems that may or may not exist. \$\endgroup\$
    – Fabio Barone
    Commented Jun 2 at 11:18
  • \$\begingroup\$ @FabioBarone,How to get inter pulse delay of 100us \$\endgroup\$
    – Confused
    Commented Jun 2 at 12:42
  • \$\begingroup\$ Use a timer, or square wave generator with a settable duty cycle. One for the positive pulse, another for the negative pulse, and add the outputs together. Do a search on this site for such signal generators, you will find many different solutions. \$\endgroup\$
    – Fabio Barone
    Commented Jun 2 at 12:51

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