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As PCB designers we all know that for high frequency signal (MHz), we should design return path (reference GND plane) underneath the signal as follows:

enter image description here

https://www.allaboutcircuits.com/technical-articles/better-pcb-design-return-paths-impedance/

Consider that we have a digital chip or analogue chip that we want to design the PCB for driving he chip. In side the package there is die and wire bonding connected to the package pins as follows:

enter image description here

https://www.iue.tuwien.ac.at/phd/poschalko/node39.html

My question is that there is no return path for the wire bonding inside the package (there is no ground reference plane underneath the wire bondings), so even if we consider this return path on the PCB for the signal which is produced by the chip, in the signal source (die and wire bonding) there is no return path. I'm trying to understand why there is no return path inside the package? if we consider this return path is crucial for signal integrity.

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    \$\begingroup\$ What do you mean by "no return path"? There is clearly a metallic connection between die / mounting base, pin, and PCB plane. \$\endgroup\$ Commented Apr 15 at 18:22
  • \$\begingroup\$ @ Tim Williams, right under the bond wires, there is air and plastic of the package, so there is no return path actually? the distance between the bond wires and the PCB ground plan is big I would say, so it is not a good refence ground plan. \$\endgroup\$
    – Andromeda
    Commented Apr 15 at 18:33
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    \$\begingroup\$ How would you define a return path? Surely it must have something to do with where current can flow, and how much / how fast, i.e. the impedance. How does the impedance of a bond wire and pin compare to the impedance of a driven signal trace? \$\endgroup\$ Commented Apr 15 at 18:40
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    \$\begingroup\$ Circuits operating at high currents + frequencies or just at high frequencies where parasitics can make a substantial difference tend to be packaged such that parasitics are minimized. For example, look at GaN FET packages, RF MMICs and chip-scale IC packages. \$\endgroup\$ Commented Apr 15 at 18:59
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    \$\begingroup\$ Return paths and ground planes are different things. You always need a return path, but it doesn't have to be a plane, you can achieve a target impedance other ways. For low frequency chips like in your picture the bond wire is fine. When you go to higher frequencies more elaborate packaging is required. \$\endgroup\$ Commented Apr 15 at 20:50

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The image of the IC you showed has the ground pin (and ground bond wire) right next to the signal pin. That's the return path.

On a typical two-layer PCB, you might have a distance of about 1.5mm between a signal trace on the top layer and the ground plane (the return path) on the bottom layer. Even on a huge SOIC package, the distance between adjacent pins is only a bit over 1mm, and internally, the bond wires are even closer together.

With high-speed signals, you typically have differential signaling with close-together traces on the PCB and adjacent pins on the package.

There's no need for a return path to be some kind of copper plane as long as it's physically close, which adjacent pins on an IC package are. The signal trace also doesn't care if the return path is beneath it, to the left or right, or even above - as long as the distance and impedance are right.

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  • \$\begingroup\$ @ Jonathan S., My questing is in general about all types of packages, not about this specific package. Even if there a pin adjacent to the signal pin, I would say there is not the best coupling between them, I expect they should be very close to each other to provide the return. For example in the aforenoted package right under the bond wires, there is air and plastic of the package, so there is no return path actually? the distance between the bond wires and the PCB ground plan is big I would say, so it is not a good refence ground plan as well. \$\endgroup\$
    – Andromeda
    Commented Apr 15 at 18:40
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    \$\begingroup\$ @Andromeda I've updated the answer to address your comment. There's generally nothing special about a ground plane that makes it a better return path than, for example, a close-by trace or adjacent bond wire. It also doesn't matter whether there's a plastic (epoxy) PCB or the plastic of an IC package between a signal and its return path. It's all still just plastic. \$\endgroup\$ Commented Apr 15 at 19:25
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    \$\begingroup\$ I mean, a plane is better, it has the least impedance for a given length conductor (granted, the definition of "length" gets awkward when something is wider than it is long). But more to the point -- a pin is still finite impedance, even if it's not the lowest possible. \$\endgroup\$ Commented Apr 15 at 19:32
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I'm trying to understand why there is no return path inside the package?

There is a return path, it is through the wire bond and the pin to the ground pin on the outside of the package. Sometimes the ground is bonded differently where the ground is actually attached to PCB ground, but this is almost always done for thermal reasons, in some DC DC converters it's also a current carrying pin:

enter image description here
https://www.electronics-cooling.com/2006/02/integrated-circuit-package-types-and-thermal-characteristics/

But you don't need a plane under the wire bond to carry current, if you are doing transmission lines, the package designers present the impedance on the outside of the package so you don't need to worry about the wire bonds (but you do need to worry about them if you are trying to match timing between traces).

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But there must be a return path. In a working circuit. Without a path the circuit would be open.

If something like a pulse of current goes via a package pin into the chip through some bond wire, there must be a matching pulse of current coming out of the chip through some other bond wire and some other package pin.

So from the PCB point of view, load is between package ground and the input pin. From the package point of view, the wires go to die just like PCB tracks go to package. The load is some structure on the die, be it a capacitance of CMOS input or termination resistor etc. From the die point of view, there are also conductive metal paths until they lead to a semiconductor input. The idea is the same, the scale is different. Just conductive wiring and some interfaces between them, like PCB to pin, pin to bond wire, bond wire to die pad, die pad to transistor input which is the load.

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